soc/marvell/mvmap2315: Add A2BUS driver

A2BUS is a custom fabric.

Testing: booted successfully.

Change-Id: If6e61f5aa30217eb601ac460d9306166b8433569
Signed-off-by: Hakim Giydan <hgiydan@marvell.com>
Reviewed-on: https://review.coreboot.org/15523
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

5 files changed, 676 insertions, 0 deletions

diff --git a/src/soc/marvell/mvmap2315/Makefile.inc b/src/soc/marvell/mvmap2315/Makefile.inc
index 1510815225..606a3cf246 100644
--- a/src/soc/marvell/mvmap2315/Makefile.inc
+++ b/src/soc/marvell/mvmap2315/Makefile.inc
@@ -15,6 +15,7 @@
 
 ifeq ($(CONFIG_SOC_MARVELL_MVMAP2315),y)
 
+bootblock-y += a2bus.c
 bootblock-y += apmu.c
 bootblock-y += bootblock.c
 bootblock-y += bdb.c
diff --git a/src/soc/marvell/mvmap2315/a2bus.c b/src/soc/marvell/mvmap2315/a2bus.c
new file mode 100644
index 0000000000..5d205cf4fb
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/a2bus.c
@@ -0,0 +1,349 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <soc/a2bus.h>
+
+const u32 NUM_SIO = 11;
+const u32 SIO_UIDS[] = {15, 14, 13, 12, 10, 8, 7, 5, 3, 1, 0};
+const u32 SP_UID = 4;
+
+static void a2bus_enable_and_check(void)
+{
+	u32 reg;
+	u32 checkval;
+
+	printk(BIOS_DEBUG, "Entering %s\n", __func__);
+
+	/* FIXME - remove once default fixed */
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win0);
+	reg |= MVMAP2315_CCU_RGF_WIN0_AHR <<
+	       MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win0, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win0);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win0, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN0_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN0_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN0_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win0) == checkval)
+		printk(BIOS_DEBUG, " win0 checks\n");
+	else
+		printk(BIOS_DEBUG, " win0 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win0), checkval);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win1);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win1, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN1_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN1_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN1_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win1) == checkval)
+		printk(BIOS_DEBUG, " win1 checks\n");
+	else
+		printk(BIOS_DEBUG, " win1 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win1), checkval);
+
+	/* FIXME - remove once default fixed */
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win2);
+	reg |= MVMAP2315_CCU_RGF_WIN2_UID <<
+	       MVMAP2315_CCU_RGF_WIN_UID_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win2, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win2);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win2, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN2_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN2_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN2_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win2) == checkval)
+		printk(BIOS_DEBUG, " win2 checks\n");
+	else
+		printk(BIOS_DEBUG, " win2 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win2), checkval);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win3);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win3, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN3_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN3_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN3_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win3) == checkval)
+		printk(BIOS_DEBUG, " win3 checks\n");
+	else
+		printk(BIOS_DEBUG, " win3 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win3), checkval);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win4);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win4, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN4_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN4_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN4_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win4) == checkval)
+		printk(BIOS_DEBUG, " win4 checks\n");
+	else
+		printk(BIOS_DEBUG, " win4 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win4), checkval);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win5);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win5, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN5_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN5_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN5_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win5) == checkval)
+		printk(BIOS_DEBUG, " win5 checks\n");
+	else
+		printk(BIOS_DEBUG, " win5 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win5), checkval);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win6);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win6, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN6_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN6_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN6_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win6) == checkval)
+		printk(BIOS_DEBUG, " win6 checks\n");
+	else
+		printk(BIOS_DEBUG, " win6 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win6), checkval);
+
+	/* FIXME - remove once default fixed */
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win7);
+	reg |= MVMAP2315_CCU_RGF_WIN7_UID <<
+	       MVMAP2315_CCU_RGF_WIN_UID_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win7, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_rgf_win7);
+	reg |= MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_rgf_win7, reg);
+
+	checkval = ((MVMAP2315_CCU_RGF_WIN7_AHR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN7_ALR) <<
+		MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT)
+		| ((MVMAP2315_CCU_RGF_WIN7_UID) <<
+		MVMAP2315_CCU_RGF_WIN_UID_SHIFT)
+		| MVMAP2315_CCU_RGF_WIN_RGFWINEN;
+
+	if (read32(&mvmap2315_a2bus_ccu->ccu_rgf_win7) == checkval)
+		printk(BIOS_DEBUG, " win7 checks\n");
+	else
+		printk(BIOS_DEBUG, " win7 no go: 0x%08x != 0x%08x\n",
+		       read32(&mvmap2315_a2bus_ccu->ccu_rgf_win7), checkval);
+
+	printk(BIOS_DEBUG, "Exiting %s\n", __func__);
+}
+
+static void a2bus_open_map(void)
+{
+	u32 reg;
+
+	printk(BIOS_DEBUG, "Entering %s\n", __func__);
+
+	/* send traffic by defaul to AON (smc0) */
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win_gcr);
+	reg &= ~MVMAP2315_CCU_WIN_CR_WINTARGET_MASK;
+	reg |= 2 << MVMAP2315_CCU_WIN_CR_WINTARGET_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win_gcr, reg);
+
+	printk(BIOS_DEBUG, "after CCU_WIN_GCR\n");
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win1_alr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRLOW_MASK;
+	reg |= MVMAP2315_CCU_WIN1_ALR << MVMAP2315_CCU_WIN_ALR_ADDRLOW_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win1_alr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win1_ahr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRHIGH_MASK;
+	reg |= MVMAP2315_CCU_WIN1_AHR << MVMAP2315_CCU_WIN_AHR_ADDRHIGH_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win1_ahr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win1_cr);
+	reg &= ~MVMAP2315_CCU_WIN_CR_WINTARGET_MASK;
+	reg |= MVMAP2315_CCU_WIN1_UID << MVMAP2315_CCU_WIN_CR_WINTARGET_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win1_cr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win1_cr);
+	reg |= MVMAP2315_CCU_CR_WINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_win1_cr, reg);
+
+	printk(BIOS_DEBUG, "after CCU_WIN1\n");
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win2_alr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRLOW_MASK;
+	reg |= MVMAP2315_CCU_WIN2_ALR << MVMAP2315_CCU_WIN_ALR_ADDRLOW_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win2_alr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win2_ahr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRHIGH_MASK;
+	reg |= MVMAP2315_CCU_WIN2_AHR << MVMAP2315_CCU_WIN_AHR_ADDRHIGH_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win2_ahr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win2_cr);
+	reg &= ~MVMAP2315_CCU_WIN_CR_WINTARGET_MASK;
+	reg |= MVMAP2315_CCU_WIN2_UID << MVMAP2315_CCU_WIN_CR_WINTARGET_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win2_cr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win2_cr);
+	reg &= ~MVMAP2315_CCU_CR_WINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_win2_cr, reg);
+
+	printk(BIOS_DEBUG, "after CCU_WIN2\n");
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win3_alr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRLOW_MASK;
+	reg |= MVMAP2315_CCU_WIN3_ALR << MVMAP2315_CCU_WIN_ALR_ADDRLOW_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win3_alr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win3_ahr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRHIGH_MASK;
+	reg |= MVMAP2315_CCU_WIN3_AHR << MVMAP2315_CCU_WIN_AHR_ADDRHIGH_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win3_ahr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win3_cr);
+	reg &= ~MVMAP2315_CCU_WIN_CR_WINTARGET_MASK;
+	reg |= MVMAP2315_CCU_WIN3_UID << MVMAP2315_CCU_WIN_CR_WINTARGET_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win3_cr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win3_cr);
+	reg |= MVMAP2315_CCU_CR_WINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_win3_cr, reg);
+
+	printk(BIOS_DEBUG, "after CCU_WIN3\n");
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win4_alr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRLOW_MASK;
+	reg |= MVMAP2315_CCU_WIN4_ALR << MVMAP2315_CCU_WIN_ALR_ADDRLOW_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win4_alr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win4_ahr);
+	reg &= ~MVMAP2315_CCU_WIN_ALR_ADDRHIGH_MASK;
+	reg |= MVMAP2315_CCU_WIN4_AHR << MVMAP2315_CCU_WIN_AHR_ADDRHIGH_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win4_ahr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win4_cr);
+	reg &= ~MVMAP2315_CCU_WIN_CR_WINTARGET_MASK;
+	reg |= MVMAP2315_CCU_WIN4_UID << MVMAP2315_CCU_WIN_CR_WINTARGET_SHIFT;
+	write32(&mvmap2315_a2bus_ccu->ccu_win4_cr, reg);
+
+	reg = read32(&mvmap2315_a2bus_ccu->ccu_win4_cr);
+	reg |= MVMAP2315_CCU_CR_WINEN;
+	write32(&mvmap2315_a2bus_ccu->ccu_win4_cr, reg);
+
+	printk(BIOS_DEBUG, "after CCU_WIN4\n");
+
+	/* open all register space */
+	a2bus_enable_and_check();
+
+	printk(BIOS_DEBUG, "Exiting %s\n", __func__);
+}
+
+void init_a2bus_config(void)
+{
+	u32 reg;
+	int i;
+
+	/* Open up the A2 address map */
+	a2bus_open_map();
+
+	/* set the bit to enable long non-modifiable */
+	for (i = 0; i < NUM_SIO; i++) {
+		printk(BIOS_DEBUG, "Writing LTC_ForceModifiable to SIO %d\n",
+		       SIO_UIDS[i]);
+
+		reg = read32(&mvmap2315_a2bus_banked->ccu_b_idacr);
+		reg |= SIO_UIDS[i] << MVMAP2315_CCU_B_IDACR_PRIVATEUID_SHIFT;
+		write32(&mvmap2315_a2bus_banked->ccu_b_idacr, reg);
+
+		reg = read32(&mvmap2315_a2bus_banked->ccu_b_ltc_cr);
+		reg |= MVMAP2315_CCU_B_LTC_CR_USERDMODROB;
+		write32(&mvmap2315_a2bus_banked->ccu_b_ltc_cr, reg);
+	}
+
+	printk(BIOS_DEBUG, "Writing LTC_ForceModifiable to SP\n");
+
+	reg = read32(&mvmap2315_a2bus_banked->ccu_b_idacr);
+	reg |= SP_UID << MVMAP2315_CCU_B_IDACR_PRIVATEUID_SHIFT;
+	write32(&mvmap2315_a2bus_banked->ccu_b_idacr, reg);
+
+	reg = read32(&mvmap2315_a2bus_banked->ccu_b_ltc_cr);
+	reg |= MVMAP2315_CCU_B_LTC_CR_USERDMODROB;
+	write32(&mvmap2315_a2bus_banked->ccu_b_ltc_cr, reg);
+
+	printk(BIOS_DEBUG, "FIXME - DISABLING MVN\n");
+
+	reg = read32(&mvmap2315_a2bus_alias6->ccu_b_smc_mvn);
+	reg &= ~MVMAP2315_CCU_B_SMC_MVN_MVNENABLE;
+	write32(&mvmap2315_a2bus_alias6->ccu_b_smc_mvn, reg);
+
+	reg = read32(&mvmap2315_a2bus_alias9->ccu_b_smc_mvn);
+	reg &= ~MVMAP2315_CCU_B_SMC_MVN_MVNENABLE;
+	write32(&mvmap2315_a2bus_alias9->ccu_b_smc_mvn, reg);
+
+	reg = read32(&mvmap2315_a2bus_alias11->ccu_b_smc_mvn);
+	reg &= ~MVMAP2315_CCU_B_SMC_MVN_MVNENABLE;
+	write32(&mvmap2315_a2bus_alias11->ccu_b_smc_mvn, reg);
+}
diff --git a/src/soc/marvell/mvmap2315/bootblock.c b/src/soc/marvell/mvmap2315/bootblock.c
index 22a8387f7f..c1de1e7536 100644
--- a/src/soc/marvell/mvmap2315/bootblock.c
+++ b/src/soc/marvell/mvmap2315/bootblock.c
@@ -22,6 +22,7 @@
 #include <console/console.h>
 #include <timestamp.h>
 #include <console/uart.h>
+#include <soc/a2bus.h>
 #include <soc/addressmap.h>
 #include <soc/apmu.h>
 #include <soc/bdb.h>
@@ -78,6 +79,9 @@ void bootblock_soc_init(void)
 		break;
 	}
 
+	printk(BIOS_DEBUG, "initializing the A2 bus.\n");
+	init_a2bus_config();
+
 	printk(BIOS_DEBUG, "Powering up the AP core0.\n");
 	ap_start((void *)MVMAP2315_ROMSTAGE_BASE);
 
diff --git a/src/soc/marvell/mvmap2315/include/soc/a2bus.h b/src/soc/marvell/mvmap2315/include/soc/a2bus.h
new file mode 100644
index 0000000000..e8b3d5de58
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/a2bus.h
@@ -0,0 +1,316 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_A2BUS_H__
+#define __SOC_MARVELL_MVMAP2315_A2BUS_H__
+
+#include <stdint.h>
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define MVMAP2315_CCU_WIN1_ALR				0x00000000
+#define MVMAP2315_CCU_WIN1_AHR				0x000007FF
+#define MVMAP2315_CCU_WIN1_UID				0x0000000B
+
+#define MVMAP2315_CCU_WIN2_ALR				0x00000000
+#define MVMAP2315_CCU_WIN2_AHR				0x000007FF
+#define MVMAP2315_CCU_WIN2_UID				0x00000020
+
+#define MVMAP2315_CCU_WIN3_ALR				0x00000800
+#define MVMAP2315_CCU_WIN3_AHR				0x00000EFF
+#define MVMAP2315_CCU_WIN3_UID				0x00000002
+
+#define MVMAP2315_CCU_WIN4_ALR				0x00008000
+#define MVMAP2315_CCU_WIN4_AHR				0x0000BFFF
+#define MVMAP2315_CCU_WIN4_UID				0x0000000B
+
+#define MVMAP2315_CCU_RGF_WIN0_ALR			0x00000010
+#define MVMAP2315_CCU_RGF_WIN0_AHR			0x000001FF
+#define MVMAP2315_CCU_RGF_WIN0_UID			0x00000006
+
+#define MVMAP2315_CCU_RGF_WIN1_ALR			0x00000200
+#define MVMAP2315_CCU_RGF_WIN1_AHR			0x000004ff
+#define MVMAP2315_CCU_RGF_WIN1_UID			0x00000003
+
+#define MVMAP2315_CCU_RGF_WIN2_ALR			0x00000500
+#define MVMAP2315_CCU_RGF_WIN2_AHR			0x0000060F
+#define MVMAP2315_CCU_RGF_WIN2_UID			0x0000000C
+
+#define MVMAP2315_CCU_RGF_WIN3_ALR			0x00000680
+#define MVMAP2315_CCU_RGF_WIN3_AHR			0x0000068F
+#define MVMAP2315_CCU_RGF_WIN3_UID			0x00000001
+
+#define MVMAP2315_CCU_RGF_WIN4_ALR			0x00000700
+#define MVMAP2315_CCU_RGF_WIN4_AHR			0x0000073F
+#define MVMAP2315_CCU_RGF_WIN4_UID			0x00000000
+
+#define MVMAP2315_CCU_RGF_WIN5_ALR			0x00000800
+#define MVMAP2315_CCU_RGF_WIN5_AHR			0x000008FF
+#define MVMAP2315_CCU_RGF_WIN5_UID			0x00000005
+
+#define MVMAP2315_CCU_RGF_WIN6_ALR			0x00000A00
+#define MVMAP2315_CCU_RGF_WIN6_AHR			0x00000FFF
+#define MVMAP2315_CCU_RGF_WIN6_UID			0x0000000F
+
+#define MVMAP2315_CCU_RGF_WIN7_ALR			0x00001000
+#define MVMAP2315_CCU_RGF_WIN7_AHR			0x000017FF
+#define MVMAP2315_CCU_RGF_WIN7_UID			0x0000000D
+
+#define MVMAP2315_CCU_WIN_ALR_ADDRLOW_SHIFT		4
+#define MVMAP2315_CCU_WIN_AHR_ADDRHIGH_SHIFT		4
+#define MVMAP2315_CCU_WIN_CR_WINTARGET_SHIFT		8
+#define MVMAP2315_CCU_CR_WINEN				BIT(0)
+#define MVMAP2315_CCU_RGF_WIN_ADDR_HI_SHIFT		19
+#define MVMAP2315_CCU_RGF_WIN_ADDR_LO_SHIFT		6
+#define MVMAP2315_CCU_RGF_WIN_UID_SHIFT			2
+#define MVMAP2315_CCU_RGF_WIN_RGFWINEN			BIT(0)
+#define MVMAP2315_CCU_WIN_CR_WINTARGET_MASK		0x7f00
+#define MVMAP2315_CCU_WIN_ALR_ADDRLOW_MASK		0xfffff0
+#define MVMAP2315_CCU_WIN_ALR_ADDRHIGH_MASK		0xfffff0
+struct mvmap2315_a2bus_ccu_regs {
+	u32 ccu_win0_cr;
+	u32 ccu_win0_scr;
+	u32 ccu_win0_alr;
+	u32 ccu_win0_ahr;
+	u32 ccu_win1_cr;
+	u32 ccu_win1_scr;
+	u32 ccu_win1_alr;
+	u32 ccu_win1_ahr;
+	u32 ccu_win2_cr;
+	u32 ccu_win2_scr;
+	u32 ccu_win2_alr;
+	u32 ccu_win2_ahr;
+	u32 ccu_win3_cr;
+	u32 ccu_win3_scr;
+	u32 ccu_win3_alr;
+	u32 ccu_win3_ahr;
+	u32 ccu_win4_cr;
+	u32 ccu_win4_scr;
+	u32 ccu_win4_alr;
+	u32 ccu_win4_ahr;
+	u32 ccu_win5_cr;
+	u32 ccu_win5_scr;
+	u32 ccu_win5_alr;
+	u32 ccu_win5_ahr;
+	u32 ccu_win6_cr;
+	u32 ccu_win6_scr;
+	u32 ccu_win6_alr;
+	u32 ccu_win6_ahr;
+	u32 ccu_win7_cr;
+	u32 ccu_win7_scr;
+	u32 ccu_win7_alr;
+	u32 ccu_win7_ahr;
+	u8 _reserved0[0x10];
+	u32 ccu_rgf_win0;
+	u32 ccu_rgf_win1;
+	u32 ccu_rgf_win2;
+	u32 ccu_rgf_win3;
+	u32 ccu_rgf_win4;
+	u32 ccu_rgf_win5;
+	u32 ccu_rgf_win6;
+	u32 ccu_rgf_win7;
+	u32 ccu_rgf_win8;
+	u32 ccu_rgf_win9;
+	u32 ccu_rgf_win10;
+	u32 ccu_rgf_win11;
+	u32 ccu_rgf_win12;
+	u32 ccu_rgf_win13;
+	u32 ccu_rgf_win14;
+	u32 ccu_rgf_win15;
+	u32 ccu_win_gcr;
+	u32 ccu_rgf_sidr0;
+	u32 ccu_rgf_sidr1;
+	u8 _reserved1[0x04];
+	u32 ccu_rar0;
+	u32 ccu_rar1;
+	u8 _reserved2[0x18];
+	u32 ccu_sl_hmr;
+	u32 ccu_sl_mimr0;
+	u32 ccu_sl_mimr1;
+	u32 ccu_sl_revid;
+	u32 ccu_sl_dtpr0;
+	u32 ccu_sl_dtpr1;
+	u32 ccu_sl_dtpr2;
+	u32 ccu_sl_dtpr3;
+	u32 ccu_sl_dtpr4;
+	u32 ccu_sl_dtpr5;
+	u32 ccu_sl_dtpr6;
+	u32 ccu_sl_dtpr7;
+	u32 ccu_sl_dtpr8;
+	u32 ccu_sl_dtpr9;
+	u32 ccu_sl_dtpr10;
+	u32 ccu_sl_dtpr11;
+	u32 ccu_sl_dtpr12;
+	u32 ccu_sl_dtpr13;
+	u32 ccu_sl_dtpr14;
+	u32 ccu_sl_dtpr15;
+	u8 _reserved3[0xb0];
+	u32 ccu_htc_cr;
+	u32 ccu_htc_sr;
+	u32 ccu_htc_mnt_cr;
+	u8 _reserved4[0x04];
+	u32 ccu_htc_acr0;
+	u32 ccu_htc_acr1;
+	u32 ccu_htc_acr2;
+	u32 ccu_htc_acr3;
+	u32 ccu_htc_acr4;
+	u32 ccu_htc_acr5;
+	u32 ccu_htc_acr6;
+	u32 ccu_htc_acr7;
+	u32 ccu_htc_acr8;
+	u32 ccu_htc_acr9;
+	u32 ccu_htc_acr10;
+	u32 ccu_htc_acr11;
+	u32 ccu_htc_acr12;
+	u32 ccu_htc_acr13;
+	u32 ccu_htc_acr14;
+	u32 ccu_htc_acr15;
+	u8 _reserved5[0x10];
+	u32 ccu_htc_aasr;
+	u32 ccu_htc_aset;
+	u32 ccu_htc_aclr;
+	u32 ccu_sft_eir0;
+	u32 ccu_sft_eir1;
+	u8 _reserved6[0x8c];
+	u32 ccu_ltc_cr;
+	u32 ccu_ltc_sr;
+	u32 ccu_ltc_hhr;
+	u32 ccu_ltc_cr1;
+	u8 _reserved7[0xe0];
+	u32 ccu_gspmu_cr;
+	u32 ccu_gspmu_sr;
+	u8 _reserved8[0x18];
+	u32 ccu_mc_cr;
+	u8 _reserved9[0x3ec];
+	u32 ccu_rgf_cr;
+	u32 ccu_rgf_scr;
+};
+
+check_member(mvmap2315_a2bus_ccu_regs, ccu_rgf_scr, 0x804);
+static struct mvmap2315_a2bus_ccu_regs * const mvmap2315_a2bus_ccu
+					= (void *)MVMAP2315_A2BUS_CCU_BASE;
+
+#define MVMAP2315_CCU_B_LTC_CR_USERDMODROB		BIT(0)
+#define MVMAP2315_CCU_B_IDACR_PRIVATEUID_SHIFT		0
+#define MVMAP2315_CCU_B_SMC_MVN_MVNENABLE		BIT(0)
+struct mvmap2315_a2bus_regs {
+	u32 ccu_b_uid;
+	u32 ccu_b_urd;
+	u32 ccu_b_sfwd;
+	u8 _reserved0[0x04];
+	u32 ccu_b_rapc;
+	u32 ccu_b_dlapc;
+	u8 _reserved1[0x08];
+	u32 ccu_b_rsc;
+	u32 ccu_b_rsu;
+	u8 _reserved2[0x08];
+	u32 ccu_b_idacr;
+	u8 _reserved3[0x0c];
+	u32 ccu_b_rsrv0;
+	u8 _reserved4[0x0c];
+	u32 ccu_dbg_ltc_cr;
+	u32 ccu_dbg_ltc_sr;
+	u8 _reserved5[0x08];
+	u32 ccu_dbg_htc_cr;
+	u32 ccu_dbg_htc_sr;
+	u8 _reserved6[0x08];
+	u32 ccu_dbg_rsu_cr;
+	u32 ccu_dbg_rsu_sr;
+	u8 _reserved7[0x08];
+	u32 ccu_dbg_smc_cr;
+	u32 ccu_dbg_smc_sr;
+	u8 _reserved8[0x98];
+	u32 ccu_b_reicr;
+	u32 ccu_b_reimr;
+	u32 ccu_b_seicr;
+	u32 ccu_b_seimr;
+	u8 _reserved9[0xd0];
+	u32 ccu_b_mpccr;
+	u32 ccu_b_pcr;
+	u32 ccu_b_drar;
+	u32 ccu_b_mpidr;
+	u32 ccu_b_pdcr;
+	u32 ccu_b_evar;
+	u32 ccu_b_l2efr;
+	u8 _reserved10[0x04];
+	u32 ccu_b_psr;
+	u32 ccu_b_mpsr;
+	u32 ccu_b_adb_cr;
+	u32 ccu_b_adb_sr;
+	u32 ccu_b_pdr_sr;
+	u32 ccu_b_pdr_cr;
+	u32 ccu_b_l2dr_sr;
+	u32 ccu_b_l2dr_cr;
+	u32 ccu_b_rvbar0;
+	u32 ccu_b_rvbar1;
+	u32 ccu_b_rvbar2;
+	u32 ccu_b_rvbar3;
+	u32 ccu_b_prcr0;
+	u32 ccu_b_prcr1;
+	u32 ccu_b_prcr2;
+	u32 ccu_b_prcr3;
+	u32 ccu_b_wrcr0;
+	u32 ccu_b_wrcr1;
+	u32 ccu_b_wrcr2;
+	u32 ccu_b_wrcr3;
+	u32 ccu_b_drcr0;
+	u32 ccu_b_drcr1;
+	u32 ccu_b_drcr2;
+	u32 ccu_b_drcr3;
+	u32 ccu_b_crcr;
+	u32 ccu_b_rcr;
+	u8 _reserved11[0x78];
+	u32 ccu_mc_rcr;
+	u32 ccu_mc_rsbr;
+	u32 ccu_mc_rtbr;
+	u32 ccu_b_smc;
+	u32 ccu_b_smc_mvn;
+	u8 _reserved12[0x2c];
+	u32 ccu_b_ltc_sr;
+	u32 ccu_b_ltc_cr;
+	u32 ccu_b_ltc_qos_ovrd;
+	u32 qos_time_seg_cr;
+	u32 qos_bw_guarantee_th;
+	u32 qos_bw_peak_th;
+	u32 qos_bw_jam_th;
+	u32 qos_regulator_out_trans_block_cr0;
+	u32 qos_prio_cr;
+	u32 qos_critical_path_cr;
+	u32 qos_regulator_out_trans_block_cr1;
+	u32 ccu_b_ltc_tc_ovrd;
+	u8 _reserved13[0x30];
+	u32 ccu_b_htc_sr;
+	u32 ccu_b_htc_prio_dl;
+	u32 ccu_b_sp_prio_mesh_lo;
+	u32 ccu_b_sp_prio_mesh_hi;
+	u32 ccu_b_sft_far_lo;
+	u32 ccu_b_sft_far_hi;
+	u32 ccu_b_htc_mnt_sr;
+};
+
+check_member(mvmap2315_a2bus_regs, ccu_b_htc_mnt_sr, 0x3b8);
+static struct mvmap2315_a2bus_regs * const mvmap2315_a2bus_banked
+				= (void *)MVMAP2315_A2BUS_BANKED_BASE;
+static struct mvmap2315_a2bus_regs * const mvmap2315_a2bus_alias6
+				= (void *)MVMAP2315_A2BUS_ALIAS6_BASE;
+static struct mvmap2315_a2bus_regs * const mvmap2315_a2bus_alias9
+				= (void *)MVMAP2315_A2BUS_ALIAS9_BASE;
+static struct mvmap2315_a2bus_regs * const mvmap2315_a2bus_alias11
+				= (void *)MVMAP2315_A2BUS_ALIAS11_BASE;
+
+void init_a2bus_config(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_A2BUS_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/addressmap.h b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
index b82b538965..6380e7d21d 100644
--- a/src/soc/marvell/mvmap2315/include/soc/addressmap.h
+++ b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
@@ -32,6 +32,12 @@
 #define MVMAP2315_GPIOG_BASE		0xE0142100
 #define MVMAP2315_GPIOH_BASE		0xE0142200
 
+#define MVMAP2315_A2BUS_BANKED_BASE	0xF0000000
+#define MVMAP2315_A2BUS_ALIAS6_BASE	0xF0002000
+#define MVMAP2315_A2BUS_ALIAS9_BASE	0xF0002C00
+#define MVMAP2315_A2BUS_ALIAS11_BASE	0xF0003400
+#define MVMAP2315_A2BUS_CCU_BASE	0xF0004000
+
 #define	MVMAP2315_BCM_GICD_BASE		0xE0111000
 #define MVMAP2315_BCM_GICC_BASE		0xE0112000