diff options
| author | Yu-Ping Wu <yupingso@google.com> | 2019-08-16 13:38:32 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-21 09:27:39 +0000 |
| commit | 4b3047833f9bce984e2710b98be5100f684cc337 (patch) | |
| tree | fc8f38d2196f0233f2274a5147a2072a588a3dfd /src/soc/mediatek/common/spi.c | |
| parent | 7fc006f7452ff944184e2091d670a647b96f9aac (diff) | |
| download | coreboot-4b3047833f9bce984e2710b98be5100f684cc337.tar.xz | |
mediatek: Use GPIO based SPI CS
Some boards (e.g., Kukui) need GPIO based CS for SPI0. This patch
changes the pinmux and binds the pins to the correponding SPIs.
When using GPIO based SPI CS, we need to manually make CS log/high
before/after SPI transactions.
BUG=b:132311067
BRANCH=none
TEST=Verified that b/132311067 is irreproducible
Change-Id: I61653fb19242b6ee6be9a45545a8b66e5c9c7cad
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common/spi.c')
| -rw-r--r-- | src/soc/mediatek/common/spi.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c index 40ab9b7002..2a668fe349 100644 --- a/src/soc/mediatek/common/spi.c +++ b/src/soc/mediatek/common/spi.c @@ -17,6 +17,8 @@ #include <assert.h> #include <console/console.h> #include <endian.h> +#include <gpio.h> +#include <stdlib.h> #include <soc/pll.h> #include <soc/spi.h> #include <timer.h> @@ -87,6 +89,8 @@ void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, clrsetbits_le32(®s->spi_pad_macro_sel_reg, SPI_PAD_SEL_MASK, pad_select); + + gpio_output(slave->cs_gpio, 1); } static void mtk_spi_dump_data(const char *name, const uint8_t *data, int size) @@ -109,6 +113,8 @@ static int spi_ctrlr_claim_bus(const struct spi_slave *slave) setbits_le32(®s->spi_cmd_reg, 1 << SPI_CMD_PAUSE_EN_SHIFT); mtk_slave->state = MTK_SPI_IDLE; + gpio_output(mtk_slave->cs_gpio, 0); + return 0; } @@ -243,6 +249,8 @@ static void spi_ctrlr_release_bus(const struct spi_slave *slave) clrbits_le32(®s->spi_cmd_reg, SPI_CMD_PAUSE_EN); spi_sw_reset(regs); mtk_slave->state = MTK_SPI_IDLE; + + gpio_output(mtk_slave->cs_gpio, 1); } static int spi_ctrlr_setup(const struct spi_slave *slave) |