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| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2019-04-26 11:58:30 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-29 12:27:24 +0000 |
| commit | 3d96f6040901dea0b83939a9bceb49babe91c614 (patch) | |
| tree | ba65b5e2689e71bcab711fa5503bdc4e4dafc0af /src/soc/mediatek/common | |
| parent | d95425c51a6cd11a9a22d007afb66ef841359e96 (diff) | |
| download | coreboot-3d96f6040901dea0b83939a9bceb49babe91c614.tar.xz | |
mediatek: Add function to raise the CPU frequency
Implement mt_pll_raise_ca53_freq() in MT8183 to raise the CPU frequency.
Move the function declaration to common header.
BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui
Change-Id: Ide8d767486d68177fa2bfbcc5b559879eca1bcda
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common')
| -rw-r--r-- | src/soc/mediatek/common/include/soc/pll_common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/pll_common.h b/src/soc/mediatek/common/include/soc/pll_common.h index 480371b67c..d0ffa86c48 100644 --- a/src/soc/mediatek/common/include/soc/pll_common.h +++ b/src/soc/mediatek/common/include/soc/pll_common.h @@ -69,5 +69,6 @@ void pll_set_pcw_change(const struct pll *pll); void mux_set_sel(const struct mux *mux, u32 sel); int pll_set_rate(const struct pll *pll, u32 rate); void mt_pll_init(void); +void mt_pll_raise_ca53_freq(u32 freq); #endif |