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authorTristan Shieh <tristan.shieh@mediatek.com>2018-07-16 20:16:40 +0800
committerJulius Werner <jwerner@chromium.org>2018-07-27 05:34:58 +0000
commit86d0d6e2cf83b73403823c69792a3ddfe1b00fde (patch)
treee8b623410b0eb2ec03198ade776559067d3bba11 /src/soc/mediatek/mt8173/Makefile.inc
parent9d6523c7db74da39cbe787d3af9bdff21ebc986c (diff)
downloadcoreboot-86d0d6e2cf83b73403823c69792a3ddfe1b00fde.tar.xz
mediatek: Refactor SPI code among similar SOCs
Refactor SPI code which will be reused amon similar SOCs. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: If5a6c554dc8361e729cf5c464325b97b2bfb7098 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27497 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8173/Makefile.inc')
-rw-r--r--src/soc/mediatek/mt8173/Makefile.inc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index 1a5ee80c07..2aa7b8d978 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -19,7 +19,7 @@ bootblock-y += bootblock.c
bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
bootblock-y += i2c.c
bootblock-y += ../common/pll.c pll.c
-bootblock-y += spi.c
+bootblock-y += ../common/spi.c spi.c
bootblock-y += ../common/timer.c
bootblock-y += timer.c
@@ -34,7 +34,7 @@ bootblock-y += ../common/mmu_operations.c mmu_operations.c
################################################################################
verstage-y += i2c.c
-verstage-y += spi.c
+verstage-y += ../common/spi.c spi.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
@@ -53,8 +53,8 @@ romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
romstage-y += ../common/cbmem.c
-romstage-y += spi.c
romstage-y += ../common/gpio.c gpio.c
+romstage-y += ../common/spi.c spi.c
romstage-y += pmic_wrap.c mt6391.c
romstage-y += memory.c
romstage-y += emi.c dramc_pi_basic_api.c dramc_pi_calibration_api.c
@@ -64,7 +64,7 @@ romstage-y += rtc.c
################################################################################
ramstage-y += ../common/cbmem.c emi.c
-ramstage-y += spi.c
+ramstage-y += ../common/spi.c spi.c
ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
ramstage-y += soc.c ../common/mtcmos.c
ramstage-y += ../common/timer.c