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author | Yidi Lin <yidi.lin@mediatek.com> | 2016-02-16 20:42:10 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2016-03-12 09:14:58 +0100 |
commit | 0bdfec85789f56167757a17a8dd18ca7418a51b3 (patch) | |
tree | 44df22a249ba735996b72d085cabe6d33c0b3ae8 /src/soc/mediatek/mt8173/include | |
parent | c6d7dcc832521ad6e5d90ad82af384ec3d24aa09 (diff) | |
download | coreboot-0bdfec85789f56167757a17a8dd18ca7418a51b3.tar.xz |
mediatek/mt8173: memlayout: Create DRAM DMA region for NOR flash DMA read.
NOR flash has a hardware limitation that it can't access SRAM region
after 4GB mode is enabled. We add a DRAM DMA region after 0x40000000
for NOR flash driver. So that the NOR flash driver can use this region
after 4GB mode is enabled.
BRANCH=none
BUG=chormoe-os-partner:49229
TEST=Boot to kernel on rev4 w/ 2GB ram and rev3 w/ 4GB ram.
And check /proc/meminfo.
Change-Id: I4a86f0028b26509589ec8d09e2d077920446ece1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: dc61ec55187959101a9e891fe5e93928e9b8176e
Original-Change-Id: Ifedc9e2dfba5d294297b3a28134997ac1dd38f94
Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/327962
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/331177
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13989
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8173/include')
-rw-r--r-- | src/soc/mediatek/mt8173/include/soc/memlayout.ld | 6 | ||||
-rw-r--r-- | src/soc/mediatek/mt8173/include/soc/mmu_operations.h | 4 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8173/include/soc/memlayout.ld b/src/soc/mediatek/mt8173/include/soc/memlayout.ld index 7d0c766297..771f32652e 100644 --- a/src/soc/mediatek/mt8173/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8173/include/soc/memlayout.ld @@ -25,6 +25,11 @@ #define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) #define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define DRAM_DMA(addr, size) \ + REGION(dram_dma, addr, size, 4K) \ + _ = ASSERT(size % 4K == 0, \ + "DRAM DMA buffer should be multiple of smallest page size (4K)!"); + SECTIONS { SRAM_L2C_START(0x000C0000) @@ -44,6 +49,7 @@ SECTIONS SRAM_END(0x00130000) DRAM_START(0x40000000) + DRAM_DMA(0x40000000, 1M) POSTRAM_CBFS_CACHE(0x40100000, 1M) RAMSTAGE(0x40200000, 256K) } diff --git a/src/soc/mediatek/mt8173/include/soc/mmu_operations.h b/src/soc/mediatek/mt8173/include/soc/mmu_operations.h index 98fffa2758..2428c4280c 100644 --- a/src/soc/mediatek/mt8173/include/soc/mmu_operations.h +++ b/src/soc/mediatek/mt8173/include/soc/mmu_operations.h @@ -29,6 +29,10 @@ extern unsigned char _sram_l2c[]; extern unsigned char _esram_l2c[]; #define _sram_l2c_size (_esram_l2c - _sram_l2c) +extern unsigned char _dram_dma[]; +extern unsigned char _edram_dma[]; +#define _dram_dma_size (_edram_dma - _dram_dma) + void mt8173_mmu_init(void); void mt8173_mmu_after_dram(void); |