mediatek/mt8173: add watchdog driver

[pg: split original commit into multiple commits]

Change-Id: I0dc8d9855c98c077d4a47227de0c504c3a846953
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2827aa08ff8712c0245a22378f3ddb0ca054255d
Original-Change-Id: I94a9ee2c00e25a37a92133f813d0cd11a3503656
Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292662
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13050
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 64 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8173/wdt.c b/src/soc/mediatek/mt8173/wdt.c
new file mode 100644
index 0000000000..ba63c13b6d
--- /dev/null
+++ b/src/soc/mediatek/mt8173/wdt.c
@@ -0,0 +1,64 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <reset.h>
+#include <soc/addressmap.h>
+#include <soc/wdt.h>
+
+static struct mt8173_wdt_regs * const mt8173_wdt = (void *)RGU_BASE;
+
+int mtk_wdt_init(void)
+{
+	uint32_t wdt_sta;
+
+	/* Write Mode register will clear status register */
+	wdt_sta = read32(&mt8173_wdt->wdt_status);
+
+	printk(BIOS_INFO, "WDT: Last reset was ");
+	if (wdt_sta & MTK_WDT_STA_HW_RST)
+		printk(BIOS_INFO, "hardware watchdog\n");
+	else if (wdt_sta & MTK_WDT_STA_SW_RST)
+		printk(BIOS_INFO, "normal software reboot\n");
+	else if (wdt_sta & MTK_WDT_STA_SPM_RST)
+		printk(BIOS_INFO, "SPM reboot\n");
+	else if (!wdt_sta)
+		printk(BIOS_INFO, "cold boot\n");
+	else
+		printk(BIOS_INFO, "unexpected reset type: %#.8x\n", wdt_sta);
+
+	/* Config watchdog reboot mode:
+	 * Clearing bits:
+	 * DUAL_MODE & IRQ: trigger reset instead of irq then reset.
+	 * EXT_POL: select watchdog output signal as active low.
+	 * ENABLE: disable watchdog on initialization.
+	 * Setting bit EXTEN to enable watchdog output.
+	 */
+	clrsetbits_le32(&mt8173_wdt->wdt_mode,
+			MTK_WDT_MODE_DUAL_MODE | MTK_WDT_MODE_IRQ |
+			MTK_WDT_MODE_EXT_POL | MTK_WDT_MODE_ENABLE,
+			MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY);
+
+	return wdt_sta;
+}
+
+void hard_reset(void)
+{
+	write32(&mt8173_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
+
+	while (1)
+		;
+}