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authorTristan Shieh <tristan.shieh@mediatek.com>2018-06-12 15:09:37 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-07-02 07:30:37 +0000
commit5da002980b1d8520f4c20be1d9e16eca607a7cd6 (patch)
treef1d120ccd7dda0da8207a841fcdecfdf386ee98c /src/soc/mediatek/mt8173
parent0423a2bd1a710c21c741a909abead82956d8cbd6 (diff)
downloadcoreboot-5da002980b1d8520f4c20be1d9e16eca607a7cd6.tar.xz
mediatek: Move mtcmos code to a common directory
Move mtcmos code which can be reused into a common directory under soc/mediatek. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: I92b138890424b4f4a68cdb00bf2326eef9cd87b7 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27029 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8173')
-rw-r--r--src/soc/mediatek/mt8173/Makefile.inc2
-rw-r--r--src/soc/mediatek/mt8173/include/soc/mtcmos.h22
-rw-r--r--src/soc/mediatek/mt8173/mtcmos.c87
3 files changed, 1 insertions, 110 deletions
diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index b382455c67..56c966ae75 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -66,7 +66,7 @@ romstage-y += rtc.c
ramstage-y += ../common/cbmem.c emi.c
ramstage-y += spi.c
ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
-ramstage-y += soc.c mtcmos.c
+ramstage-y += soc.c ../common/mtcmos.c
ramstage-y += ../common/timer.c
ramstage-y += timer.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
diff --git a/src/soc/mediatek/mt8173/include/soc/mtcmos.h b/src/soc/mediatek/mt8173/include/soc/mtcmos.h
deleted file mode 100644
index 5460e1fde0..0000000000
--- a/src/soc/mediatek/mt8173/include/soc/mtcmos.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 MediaTek Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __SOC_MEDIATEK_COMMON_MTCMOS_H__
-#define __SOC_MEDIATEK_COMMON_MTCMOS_H__
-
-void mtcmos_audio_power_on(void);
-void mtcmos_display_power_on(void);
-
-#endif /* __SOC_MEDIATEK_COMMON_MTCMOS_H__ */
diff --git a/src/soc/mediatek/mt8173/mtcmos.c b/src/soc/mediatek/mt8173/mtcmos.c
deleted file mode 100644
index 00e37edb9b..0000000000
--- a/src/soc/mediatek/mt8173/mtcmos.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 MediaTek Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stddef.h>
-
-#include <arch/io.h>
-#include <soc/mtcmos.h>
-#include <soc/spm.h>
-
-struct power_domain_data {
- void *pwr_con;
- u32 pwr_sta_mask;
- u32 sram_pdn_mask;
- u32 sram_ack_mask;
-};
-
-enum {
- SRAM_ISOINT_B = 1U << 6,
- SRAM_CKISO = 1U << 5,
- PWR_CLK_DIS = 1U << 4,
- PWR_ON_2ND = 1U << 3,
- PWR_ON = 1U << 2,
- PWR_ISO = 1U << 1,
- PWR_RST_B = 1U << 0
-};
-
-enum {
- DISP_PWR_STA_MASK = 0x1 << 3,
- AUDIO_PWR_STA_MASK = 0x1 << 24,
-};
-
-static void mtcmos_power_on(const struct power_domain_data *pd)
-{
- write32(&mtk_spm->poweron_config_set,
- (SPM_PROJECT_CODE << 16) | (1U << 0));
-
- setbits_le32(pd->pwr_con, PWR_ON);
- setbits_le32(pd->pwr_con, PWR_ON_2ND);
-
- while (!(read32(&mtk_spm->pwr_status) & pd->pwr_sta_mask) ||
- !(read32(&mtk_spm->pwr_status_2nd) & pd->pwr_sta_mask))
- continue;
-
- clrbits_le32(pd->pwr_con, PWR_CLK_DIS);
- clrbits_le32(pd->pwr_con, PWR_ISO);
- setbits_le32(pd->pwr_con, PWR_RST_B);
- clrbits_le32(pd->pwr_con, pd->sram_pdn_mask);
-
- while (read32(pd->pwr_con) & pd->sram_ack_mask)
- continue;
-}
-
-void mtcmos_display_power_on(void)
-{
- static const struct power_domain_data disp = {
- .pwr_con = &mtk_spm->dis_pwr_con,
- .pwr_sta_mask = DISP_PWR_STA_MASK,
- .sram_pdn_mask = DISP_SRAM_PDN_MASK,
- .sram_ack_mask = DISP_SRAM_ACK_MASK,
- };
-
- mtcmos_power_on(&disp);
-}
-
-void mtcmos_audio_power_on(void)
-{
- static const struct power_domain_data audio = {
- .pwr_con = &mtk_spm->audio_pwr_con,
- .pwr_sta_mask = AUDIO_PWR_STA_MASK,
- .sram_pdn_mask = AUDIO_SRAM_PDN_MASK,
- .sram_ack_mask = AUDIO_SRAM_ACK_MASK,
- };
-
- mtcmos_power_on(&audio);
-}