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| author | Hung-Te Lin <hungte@chromium.org> | 2019-08-07 10:58:36 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2019-08-15 00:51:05 +0000 |
| commit | 32ddc0d9f7186471c2f1ae8dc7279639dcaadb06 (patch) | |
| tree | 7e4a73e02cdac26010f001b2c9c52e96c113142e /src/soc/mediatek/mt8173 | |
| parent | 75e4314675cecf6faf7c02920a86f3157e6ba5c1 (diff) | |
| download | coreboot-32ddc0d9f7186471c2f1ae8dc7279639dcaadb06.tar.xz | |
soc/mediatek/mt8183: Add DSI driver
The MT8183 display serial interface (DSI) is based on MIPI
Alliance Specification, supporting high-speed serial data
transfer between host processor and peripheral devices such
as display modules.
DSI supports both video mode and command mode data transfer
defined in MIPI spec, and it also provides bidirectional
transmission with low-power mode to receive messages from
the peripheral.
Reference: MT8183 Application Processor Functional Spec,
6.7 Display Serial Interface (DSI)
BUG=b:80501386,b:117254947
BRANCH=none
TEST=Boots correctly on Kukui
Change-Id: Ic413f524ca0b36f0b01f723a71fe9745e2710cd2
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8173')
| -rw-r--r-- | src/soc/mediatek/mt8173/include/soc/dsi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8173/include/soc/dsi.h b/src/soc/mediatek/mt8173/include/soc/dsi.h index 43cbdcb909..e7c1d28b1f 100644 --- a/src/soc/mediatek/mt8173/include/soc/dsi.h +++ b/src/soc/mediatek/mt8173/include/soc/dsi.h @@ -22,6 +22,7 @@ #define MTK_DSI_MIPI_RATIO_NUMERATOR 102 #define MTK_DSI_MIPI_RATIO_DENOMINATOR 100 #define MTK_DSI_DATA_RATE_MIN_MHZ 50 +#define MTK_DSI_HAVE_SIZE_CON 0 #define PIXEL_STREAM_CUSTOM_HEADER 0 /* MIPITX is SOC specific and cannot live in common. */ |