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author | Huayang Duan <huayang.duan@mediatek.com> | 2018-09-26 21:23:53 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-03 22:22:58 +0000 |
commit | 4d15d2fc122a3548099504fc1f49d70087ac45ad (patch) | |
tree | 24426dfaa1e49f350bbad9c0407d68b4efce1514 /src/soc/mediatek/mt8183/Makefile.inc | |
parent | 7b78a805da0207449c5ea1baf56030ab9f54e2d6 (diff) | |
download | coreboot-4d15d2fc122a3548099504fc1f49d70087ac45ad.tar.xz |
mediatek/mt8183: Add DDR driver of memory test part
Write a range of memory with special pattern, and read it back to check
whether the read value same as write.
The test pattern include 8bit offset read write, 16 bit offset read
write, 32bit offset read write, and cross testing.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui, and inits DRAM successfully with related
patches.
Change-Id: I30d5fbd3db2acf36e3058ba4f34558b981fba78c
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/28845
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: You-Cheng Syu <youcheng@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/Makefile.inc')
-rw-r--r-- | src/soc/mediatek/mt8183/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index b981e450f8..9aa1733f38 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -26,6 +26,7 @@ romstage-y += dramc_init_setting.c romstage-y += dramc_pi_basic_api.c romstage-y += dramc_pi_calibration_api.c romstage-y += memory.c +romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c romstage-y += ../common/gpio.c gpio.c romstage-y += ../common/mmu_operations.c mmu_operations.c romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c |