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author | Weiyi Lu <weiyi.lu@mediatek.com> | 2018-06-01 14:58:54 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-11 10:47:09 +0000 |
commit | 60e1fcb07fde803952cb7104cdd386b668f269e8 (patch) | |
tree | 02030fef3a1699cf9042c81852c92f89db321d3c /src/soc/mediatek/mt8183/Makefile.inc | |
parent | 17180af69a95ad5823c501737d0ba2a0e849b4df (diff) | |
download | coreboot-60e1fcb07fde803952cb7104cdd386b668f269e8.tar.xz |
mediatek/mt8183: add PLL and clock init support
Add PLL and clock init code.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui. Checked with frequency meter in SOC.
Change-Id: I1f561f66bcf12de6a95c2f64eecd9508bd9bb26c
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-on: https://review.coreboot.org/27031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/Makefile.inc')
-rw-r--r-- | src/soc/mediatek/mt8183/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index 651f2e4e0e..bd0b31daf9 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y) bootblock-y += bootblock.c bootblock-y += ../common/mmu_operations.c mmu_operations.c +bootblock-y += ../common/pll.c pll.c bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-y += ../common/timer.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) |