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author | Keith Short <keithshort@chromium.org> | 2018-12-17 14:21:46 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-24 13:52:43 +0000 |
commit | 514363541fd1f78cc786a0c1f8d5f047f3baebc7 (patch) | |
tree | ed1f496bf106c33d3f1385524eef1c938dc2ae18 /src/soc/mediatek/mt8183/bootblock.c | |
parent | fc707892de7319cca3dc83e03034e443b2c9f9bb (diff) | |
download | coreboot-514363541fd1f78cc786a0c1f8d5f047f3baebc7.tar.xz |
cr50: Add probe command to poll Cr50 until DID VID is valid
Added new routine cr50_i2c_probe() which ensures that communication
with the Cr50 over I2C is good prior to attempting other initialization
of the Cr50 and TPM state. This avoids a race condition when the Cr50
is first booting that it may reset it's I2C slave interface during the
first few I2C transactions initiated from coreboot.
BUG=b:120009037
BRANCH=none
TEST=Run the Cr50 factory update against Careena board. Confirm that
I2C reads are retried until the DID VID is valid. Tested against debug
Cr50 firmware that forced failure of cr50_i2c_probe() and verfied that
coreboot shows recovery screen.
Change-Id: I47c59a32378ad00336277e111e81ba8d2d63e69a
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/30295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8183/bootblock.c')
0 files changed, 0 insertions, 0 deletions