mediatek/mt8183: Add a stub implementation of the MT8183 SOC

Most things still need to be filled in, but this will allow us to build
boards which use this SOC.

BUG=b:80501386
BRANCH=none
TEST=timer and uart work fine

Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26659
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

4 files changed, 132 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8183/include/soc/addressmap.h b/src/soc/mediatek/mt8183/include/soc/addressmap.h
new file mode 100644
index 0000000000..59f4acf3f8
--- /dev/null
+++ b/src/soc/mediatek/mt8183/include/soc/addressmap.h
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
+#define __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
+
+enum {
+	IO_PHYS		= 0x10000000,
+	DDR_BASE	= 0x40000000
+};
+
+enum {
+	GPT_BASE	= IO_PHYS + 0x00008000,
+	UART0_BASE	= IO_PHYS + 0x01002000,
+};
+
+#endif
diff --git a/src/soc/mediatek/mt8183/include/soc/emi.h b/src/soc/mediatek/mt8183/include/soc/emi.h
new file mode 100644
index 0000000000..edc27a8c99
--- /dev/null
+++ b/src/soc/mediatek/mt8183/include/soc/emi.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_MEDIATEK_MT8183_EMI_H
+#define SOC_MEDIATEK_MT8183_EMI_H
+
+#include <stdint.h>
+#include <types.h>
+
+size_t sdram_size(void);
+
+#endif
diff --git a/src/soc/mediatek/mt8183/include/soc/flash_controller.h b/src/soc/mediatek/mt8183/include/soc/flash_controller.h
new file mode 100644
index 0000000000..ec3593c9f9
--- /dev/null
+++ b/src/soc/mediatek/mt8183/include/soc/flash_controller.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MEDIATEK_MT8183_FLASH_CONTROLLER_H__
+#define __SOC_MEDIATEK_MT8183_FLASH_CONTROLLER_H__
+
+#include <spi-generic.h>
+
+int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash);
+
+#endif
diff --git a/src/soc/mediatek/mt8183/include/soc/memlayout.ld b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
new file mode 100644
index 0000000000..541f21e0eb
--- /dev/null
+++ b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <memlayout.h>
+
+#include <arch/header.ld>
+
+/*
+ * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM.
+ * It will be returned before starting the ramstage.
+ * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
+ */
+#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
+#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
+
+#define DRAM_DMA(addr, size) \
+	REGION(dram_dma, addr, size, 4K) \
+	_ = ASSERT(size % 4K == 0, \
+		"DRAM DMA buffer should be multiple of smallest page size (4K)!");
+
+SECTIONS
+{
+	SRAM_START(0x00100000)
+	VBOOT2_WORK(0x00100000, 12K)
+	PRERAM_CBMEM_CONSOLE(0x00103000, 16K)
+	WATCHDOG_TOMBSTONE(0x00107000, 4)
+	PRERAM_CBFS_CACHE(0x00107004, 16K - 4)
+	TIMESTAMP(0x0010B000, 4K)
+	STACK(0x0010C000, 16K)
+	TTB(0x00110000, 28K)
+	DMA_COHERENT(0x00117000, 4K)
+	SRAM_END(0x00120000)
+
+	SRAM_L2C_START(0x00200000)
+	BOOTBLOCK(0x00201000, 85K)
+	VERSTAGE(0x00217000, 114K)
+	ROMSTAGE(0x00233800, 92K)
+	SRAM_L2C_END(0x00280000)
+
+	DRAM_START(0x40000000)
+	DRAM_DMA(0x40000000, 1M)
+	POSTRAM_CBFS_CACHE(0x40100000, 1M)
+	RAMSTAGE(0x40200000, 256K)
+}