diff options
author | Huayang Duan <huayang.duan@mediatek.com> | 2019-08-19 16:40:01 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-24 10:28:01 +0000 |
commit | 9400f84d3111ee888ac1a2b2e1fc942873e0d67a (patch) | |
tree | 580b0d1df454cd2adec1ce80f0d80f6f9a6d00c6 /src/soc/mediatek/mt8183/include | |
parent | 1011ed76a629691491c3f18916277ae941a2c761 (diff) | |
download | coreboot-9400f84d3111ee888ac1a2b2e1fc942873e0d67a.tar.xz |
mediatek/mt8183: Use different DRAM frequencies for eMCP DDR
Devices using eMCP may run at a high DRAM frequency (e.g., 3600Mbps)
while those with discrete DRAM can only run at 3200Mbps. This patch
enables 3600Mbps for eMCP DDR for better system performance.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly and stress test passes on Kukui
Change-Id: Iab6a9c2c390feeb9497b051a255b29566909e656
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/include')
-rw-r--r-- | src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h b/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h index e699e80f8b..ef6eaf162c 100644 --- a/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h +++ b/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h @@ -16,7 +16,12 @@ #ifndef _DRAMC_COMMON_MT8183_H_ #define _DRAMC_COMMON_MT8183_H_ -#define DRAM_DFS_SHUFFLE_MAX 3 +enum { + DRAM_DFS_SHUFFLE_1 = 0, + DRAM_DFS_SHUFFLE_2, + DRAM_DFS_SHUFFLE_3, + DRAM_DFS_SHUFFLE_MAX +}; enum { CHANNEL_A = 0, |