diff options
| author | Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> | 2019-08-29 15:41:28 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-18 12:20:58 +0000 |
| commit | 0d0b7a1a5722a6dd7a7c460ed9ebbb41c922aad7 (patch) | |
| tree | f41a53c5dd94e9afc637cd291d897c9ea8a86382 /src/soc/mediatek/mt8183/include | |
| parent | 8d5313774982d9d637683ec1de0f53528aa700ee (diff) | |
| download | coreboot-0d0b7a1a5722a6dd7a7c460ed9ebbb41c922aad7.tar.xz | |
soc/mediatek/mt8183: Allow modifying vddq voltage
DRAM DVFS needs to be calibrated with different vddq voltages to get
correct parameters.
A new API is added to allow changing vddq voltage.
BUG=b:80501386
BRANCH=none
TEST=measure vddq voltage with multimeter
Change-Id: I5f0d82596a1709bf0d37885f257646133f18f210
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35147
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/include')
| -rw-r--r-- | src/soc/mediatek/mt8183/include/soc/mt6358.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h index 6ed654ccfd..6b74695bab 100644 --- a/src/soc/mediatek/mt8183/include/soc/mt6358.h +++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h @@ -19,9 +19,18 @@ enum { PMIC_SWCID = 0x000a, PMIC_VM_MODE = 0x004e, + PMIC_TOP_CKPDN_CON0_SET = 0x010e, + PMIC_TOP_CKPDN_CON0_CLR = 0x0110, + PMIC_TOP_CKHWEN_CON0_SET = 0x012c, + PMIC_TOP_CKHWEN_CON0_CLR = 0x012e, PMIC_TOP_RST_MISC = 0x014c, PMIC_TOP_RST_MISC_SET = 0x014e, PMIC_TOP_RST_MISC_CLR = 0x0150, + PMIC_OTP_CON0 = 0x038a, + PMIC_OTP_CON8 = 0x039a, + PMIC_OTP_CON11 = 0x03a0, + PMIC_OTP_CON12 = 0x03a2, + PMIC_OTP_CON13 = 0x03a4, PMIC_TOP_TMA_KEY = 0x03a8, PMIC_PWRHOLD = 0x0a08, PMIC_CPSDSA4 = 0x0a2e, @@ -33,7 +42,9 @@ enum { PMIC_VDRAM1_DBG0 = 0x161e, PMIC_VDRAM1_VOSEL = 0x1626, PMIC_SMPS_ANA_CON0 = 0x1808, + PMIC_VDDQ_OP_EN = 0x1b16, PMIC_VSIM2_ANA_CON0 = 0x1e30, + PMIC_VDDQ_ELR_0 = 0x1ec4, }; struct pmic_setting { @@ -51,5 +62,7 @@ unsigned int pmic_get_vcore_vol(void); void pmic_set_vcore_vol(unsigned int vcore_uv); unsigned int pmic_get_vdram1_vol(void); void pmic_set_vdram1_vol(unsigned int vdram_uv); +unsigned int pmic_get_vddq_vol(void); +void pmic_set_vddq_vol(unsigned int vddq_uv); #endif /* __SOC_MEDIATEK_MT6358_H__ */ |