diff options
author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-06-05 12:20:00 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-02 07:30:56 +0000 |
commit | 85c34750cf4d70ac0b6277950cb428185c962af7 (patch) | |
tree | 758451851ca81a14645c8799e871b5eb93fe7863 /src/soc/mediatek/mt8183/mtcmos.c | |
parent | 5da002980b1d8520f4c20be1d9e16eca607a7cd6 (diff) | |
download | coreboot-85c34750cf4d70ac0b6277950cb428185c962af7.tar.xz |
mediatek/mt8183: Add mtcmos init support
Using common mtcmos code to power on audio and display modules in SOC.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui. Passes the status check at the end of
mtcmos_power_on()
Change-Id: I41f16ba36432a8bbc47793cec2979753c9f84b43
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/mtcmos.c')
-rw-r--r-- | src/soc/mediatek/mt8183/mtcmos.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/mtcmos.c b/src/soc/mediatek/mt8183/mtcmos.c new file mode 100644 index 0000000000..1c0d7aba7d --- /dev/null +++ b/src/soc/mediatek/mt8183/mtcmos.c @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <soc/infracfg.h> +#include <soc/smi.h> +#include <soc/mtcmos.h> + +enum { + DISP_PROT_STEP1_0_MASK = 0x3 << 16, + DISP_PROT_STEP2_0_MASK = 0x3 << 10, + DISP_PROT_STEP2_1_MASK = 0xff, +}; + +void mtcmos_protect_display_bus(void) +{ + write32(&mt8183_infracfg->infra_topaxi_protecten_clr, + DISP_PROT_STEP2_0_MASK); + write32(&mt8183_smi->smi_common_clamp_en_clr, DISP_PROT_STEP2_1_MASK); + write32(&mt8183_infracfg->infra_topaxi_protecten_1_clr, + DISP_PROT_STEP1_0_MASK); +} |