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authorYu-Ping Wu <yupingso@chromium.org>2019-10-07 16:57:24 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-10-09 22:24:00 +0000
commit0e5b196cb6f03eba70756d246d86c25270f7b4f2 (patch)
treec5c15a3d3406298b8e0b4f09fb64077a2e447599 /src/soc/mediatek/mt8183
parent078332e4d82a9a2edfa4e3fbcdc8b0b78356f989 (diff)
downloadcoreboot-0e5b196cb6f03eba70756d246d86c25270f7b4f2.tar.xz
soc/mediatek/mt8183: Change argument type of mt_set_emi
Since struct dramc_param has been defined, we can pass the struct directly from mt_mem_init(). BUG=b:139099592 BRANCH=none TEST=emerge-kukui coreboot Change-Id: If7333fb579eff76dd9d1c2bf6fdfe7eccb22050f Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35846 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183')
-rw-r--r--src/soc/mediatek/mt8183/emi.c9
-rw-r--r--src/soc/mediatek/mt8183/include/soc/emi.h3
-rw-r--r--src/soc/mediatek/mt8183/memory.c7
3 files changed, 10 insertions, 9 deletions
diff --git a/src/soc/mediatek/mt8183/emi.c b/src/soc/mediatek/mt8183/emi.c
index 3b5b2a7631..52baeb1688 100644
--- a/src/soc/mediatek/mt8183/emi.c
+++ b/src/soc/mediatek/mt8183/emi.c
@@ -14,10 +14,11 @@
*/
#include <device/mmio.h>
-#include <soc/emi.h>
-#include <soc/infracfg.h>
+#include <soc/dramc_param.h>
#include <soc/dramc_pi_api.h>
#include <soc/dramc_register.h>
+#include <soc/emi.h>
+#include <soc/infracfg.h>
static const u8 freq_shuffle[DRAM_DFS_SHUFFLE_MAX] = {
[DRAM_DFS_SHUFFLE_1] = LP4X_DDR3200,
@@ -355,7 +356,7 @@ static void after_calib(void)
dramc_runtime_config();
}
-void mt_set_emi(const struct sdram_params *freq_params)
+void mt_set_emi(const struct dramc_param *dparam)
{
const u8 *freq_tbl;
const int shuffle = DRAM_DFS_SHUFFLE_1;
@@ -368,7 +369,7 @@ void mt_set_emi(const struct sdram_params *freq_params)
freq_tbl = freq_shuffle;
current_freqsel = freq_tbl[shuffle];
- params = &freq_params[shuffle];
+ params = &dparam->freq_params[shuffle];
init_dram(params, current_freqsel);
do_calib(params, current_freqsel);
diff --git a/src/soc/mediatek/mt8183/include/soc/emi.h b/src/soc/mediatek/mt8183/include/soc/emi.h
index 624c0a4ac3..2821511014 100644
--- a/src/soc/mediatek/mt8183/include/soc/emi.h
+++ b/src/soc/mediatek/mt8183/include/soc/emi.h
@@ -71,6 +71,7 @@ struct sdram_params {
u16 delay_cell_unit;
};
+struct dramc_param;
struct dramc_param_ops;
enum {
@@ -87,7 +88,7 @@ int complex_mem_test(u8 *start, unsigned int len);
size_t sdram_size(void);
const struct sdram_params *get_sdram_config(void);
void enable_emi_dcm(void);
-void mt_set_emi(const struct sdram_params *freq_params);
+void mt_set_emi(const struct dramc_param *dparam);
void mt_mem_init(struct dramc_param_ops *dparam_ops);
#endif /* SOC_MEDIATEK_MT8183_EMI_H */
diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c
index c2ddb999de..19f732609f 100644
--- a/src/soc/mediatek/mt8183/memory.c
+++ b/src/soc/mediatek/mt8183/memory.c
@@ -137,7 +137,6 @@ static void init_sdram_params(struct sdram_params *dst,
void mt_mem_init(struct dramc_param_ops *dparam_ops)
{
struct dramc_param *dparam = dparam_ops->param;
- struct sdram_params *freq_params = dparam->freq_params;
u16 config = 0;
if (CONFIG(MT8183_DRAM_EMCP))
@@ -148,7 +147,7 @@ void mt_mem_init(struct dramc_param_ops *dparam_ops)
if (dram_run_fast_calibration(dparam, config) == 0) {
printk(BIOS_INFO,
"DRAM calibraion params loaded from flash\n");
- mt_set_emi(freq_params);
+ mt_set_emi(dparam);
mt_mem_test();
return;
}
@@ -174,7 +173,7 @@ void mt_mem_init(struct dramc_param_ops *dparam_ops)
"falling back to load default sdram param\n", err);
/* Init params from sdram configs and run partial calibration */
- init_sdram_params(freq_params, get_sdram_config());
- mt_set_emi(freq_params);
+ init_sdram_params(dparam->freq_params, get_sdram_config());
+ mt_set_emi(dparam);
mt_mem_test();
}