diff options
author | Qii Wang <qii.wang@mediatek.com> | 2020-11-20 17:36:07 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-14 03:55:13 +0000 |
commit | cd83bf8874b13639bbd0b9e3b1270a5771d5e5bc (patch) | |
tree | 6a620a74dd402e61530de3aeb2876e656af9bb50 /src/soc/mediatek/mt8192/Makefile.inc | |
parent | 9ef72ca7db807a7ae2e7d78144773940dd688a78 (diff) | |
download | coreboot-cd83bf8874b13639bbd0b9e3b1270a5771d5e5bc.tar.xz |
soc/mediatek/mt8192: add i2c driver support
Add I2C controller for MT8192, and revise the common I2C driver
to support I2C controller running in APDMA async mode. In that
case we have to initiate a different handshake protocol and reset
I2C differently.
BUG=b:155715435
TEST=Asurada boots up to shell
Signed-off-by: Qii Wang <qii.wang@mediatek.com>
Change-Id: I13835e00eb674a93aa5496a9870d1e601e263368
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47800
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8192/Makefile.inc')
-rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index bd6fe27377..8394c12fba 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -4,6 +4,7 @@ bootblock-y += ../common/auxadc.c bootblock-y += bootblock.c bootblock-y += flash_controller.c bootblock-y += ../common/gpio.c gpio.c +bootblock-y += ../common/i2c.c i2c.c bootblock-y += ../common/mmu_operations.c bootblock-y += ../common/pll.c pll.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c @@ -17,6 +18,7 @@ bootblock-y += mt6359p.c verstage-y += ../common/auxadc.c verstage-y += flash_controller.c verstage-y += ../common/gpio.c gpio.c +verstage-y += ../common/i2c.c i2c.c verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c verstage-y += ../common/timer.c verstage-y += ../common/uart.c @@ -26,6 +28,7 @@ romstage-y += ../common/cbmem.c romstage-y += emi.c romstage-y += flash_controller.c romstage-y += ../common/gpio.c gpio.c +romstage-y += ../common/i2c.c i2c.c romstage-y += ../common/mmu_operations.c mmu_operations.c romstage-y += memory.c dramc_param.c ../common/memory_test.c romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c @@ -38,6 +41,7 @@ ramstage-y += ../common/auxadc.c ramstage-y += dpm.c ramstage-y += flash_controller.c ramstage-y += ../common/gpio.c gpio.c +ramstage-y += ../common/i2c.c i2c.c ramstage-y += emi.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-y += ../common/mcu.c |