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| author | Jitao Shi <jitao.shi@mediatek.com> | 2021-03-12 17:35:18 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-08 10:44:16 +0000 |
| commit | 104b7a949d8daef927657983b1ea1ed0f614dd29 (patch) | |
| tree | a4d4e2979169d4ea06f34bca9c5cc09dca0f1151 /src/soc/mediatek | |
| parent | fc862dd7d27edba14a406cf72b475afee252764e (diff) | |
| download | coreboot-104b7a949d8daef927657983b1ea1ed0f614dd29.tar.xz | |
soc/mediatek: dsi: fine tune the delta time for EoTp
We seperate the EoTp packet extra data. So need to reduce the delta.
BUG=b:173603645
BRANCH=kukui
TEST=Display is normal on Kukui
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Change-Id: I0666068cfb04b78eb706278814163f050da32b9c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
| -rw-r--r-- | src/soc/mediatek/common/dsi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/common/dsi.c b/src/soc/mediatek/common/dsi.c index 3f35443ba1..5c969db1da 100644 --- a/src/soc/mediatek/common/dsi.c +++ b/src/soc/mediatek/common/dsi.c @@ -204,7 +204,7 @@ static void mtk_dsi_config_vdo_timing(u32 mode_flags, u32 format, u32 lanes, data_phy_cycles = phy_timing->lpx + phy_timing->da_hs_prepare + phy_timing->da_hs_zero + phy_timing->da_hs_exit + 3; - u32 delta = 12; + u32 delta = 10; if (mode_flags & MIPI_DSI_MODE_EOT_PACKET) delta += 2; |