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authorYidi Lin <yidi.lin@mediatek.com>2021-03-11 17:31:02 +0800
committerHung-Te Lin <hungte@chromium.org>2021-03-15 02:27:57 +0000
commit2fcbebbbcde4b13df5807d771beeffb0490a9644 (patch)
treeacdf1c1bd3bfb1dead798cee3eba0ba373152576 /src/soc/mediatek
parent50c667de524339bb839de71ce0e785a1693d5de3 (diff)
downloadcoreboot-2fcbebbbcde4b13df5807d771beeffb0490a9644.tar.xz
mb/google/asurada: revise PMIC and RTC initialization
Move the initialization from bootblock to romstage for following reasons: - Follow MT8183 initialization sequence. - PMIC and RTC functions are only called after verstage. - Reduce bootblock size. - PMIC initialization setting is complex and may need to be changed by an RW firmware update. TEST=boot to kernel successfully Change-Id: I3e4c3f918639590ffc73076450235771d06aae91 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Xi Chen <xixi.chen@mediatek.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8192/Makefile.inc7
-rw-r--r--src/soc/mediatek/mt8192/bootblock.c12
-rw-r--r--src/soc/mediatek/mt8192/include/soc/mt6315.h1
-rw-r--r--src/soc/mediatek/mt8192/include/soc/mt6359p.h1
-rw-r--r--src/soc/mediatek/mt8192/mt6315.c5
-rw-r--r--src/soc/mediatek/mt8192/mt6359p.c5
6 files changed, 2 insertions, 29 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc
index 2370c654c5..f88ca11e63 100644
--- a/src/soc/mediatek/mt8192/Makefile.inc
+++ b/src/soc/mediatek/mt8192/Makefile.inc
@@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y)
bootblock-y += ../common/auxadc.c
bootblock-y += bootblock.c
-bootblock-y += clkbuf.c srclken_rc.c
bootblock-y += eint_event.c
bootblock-y += ../common/flash_controller.c
bootblock-y += ../common/gpio.c gpio.c
@@ -13,10 +12,6 @@ bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
bootblock-y += ../common/timer.c
bootblock-y += ../common/uart.c
bootblock-y += ../common/wdt.c
-bootblock-y += pmif.c pmif_clk.c pmif_spi.c pmif_spmi.c
-bootblock-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
-bootblock-y += mt6315.c
-bootblock-y += mt6359p.c
verstage-y += ../common/auxadc.c
verstage-y += ../common/flash_controller.c
@@ -28,6 +23,7 @@ verstage-y += ../common/uart.c
romstage-y += ../common/auxadc.c
romstage-y += ../common/cbmem.c
+romstage-y += clkbuf.c srclken_rc.c
romstage-y += ../common/dram_init.c
romstage-y += ../common/dramc_param.c
romstage-y += ../common/flash_controller.c
@@ -40,6 +36,7 @@ romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
romstage-y += ../common/timer.c
romstage-y += ../common/uart.c
romstage-y += pmif.c pmif_clk.c pmif_spi.c pmif_spmi.c
+romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
romstage-y += mt6315.c
romstage-y += mt6359p.c
diff --git a/src/soc/mediatek/mt8192/bootblock.c b/src/soc/mediatek/mt8192/bootblock.c
index 0249b15627..17fd27e53f 100644
--- a/src/soc/mediatek/mt8192/bootblock.c
+++ b/src/soc/mediatek/mt8192/bootblock.c
@@ -1,15 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
-#include <soc/clkbuf.h>
#include <soc/eint_event.h>
#include <soc/mmu_operations.h>
-#include <soc/mt6315.h>
-#include <soc/mt6359p.h>
#include <soc/pll.h>
-#include <soc/pmif.h>
-#include <soc/rtc.h>
-#include <soc/srclken_rc.h>
#include <soc/wdt.h>
void bootblock_soc_init(void)
@@ -17,11 +11,5 @@ void bootblock_soc_init(void)
mtk_mmu_init();
mtk_wdt_init();
mt_pll_init();
- mtk_pmif_init();
- mt6359p_init();
- mt6315_init();
- srclken_rc_init();
- clk_buf_init();
- rtc_boot();
unmask_eint_event_mask();
}
diff --git a/src/soc/mediatek/mt8192/include/soc/mt6315.h b/src/soc/mediatek/mt8192/include/soc/mt6315.h
index a243e3f761..4d179bed68 100644
--- a/src/soc/mediatek/mt8192/include/soc/mt6315.h
+++ b/src/soc/mediatek/mt8192/include/soc/mt6315.h
@@ -35,7 +35,6 @@ enum {
};
void mt6315_init(void);
-void mt6315_romstage_init(void);
void mt6315_buck_set_voltage(u32 slvid, u32 buck_id, u32 buck_uv);
u32 mt6315_buck_get_voltage(u32 slvid, u32 buck_id);
#endif /* __SOC_MEDIATEK_MT6315_H__ */
diff --git a/src/soc/mediatek/mt8192/include/soc/mt6359p.h b/src/soc/mediatek/mt8192/include/soc/mt6359p.h
index 5519cc2383..9605272d3e 100644
--- a/src/soc/mediatek/mt8192/include/soc/mt6359p.h
+++ b/src/soc/mediatek/mt8192/include/soc/mt6359p.h
@@ -62,7 +62,6 @@ enum {
#define EFUSE_RG_VPA_OC_FT 78
void mt6359p_init(void);
-void mt6359p_romstage_init(void);
void mt6359p_buck_set_voltage(u32 buck_id, u32 buck_uv);
u32 mt6359p_buck_get_voltage(u32 buck_id);
void mt6359p_set_vm18_voltage(u32 vm18_uv);
diff --git a/src/soc/mediatek/mt8192/mt6315.c b/src/soc/mediatek/mt8192/mt6315.c
index 4f3e54c966..efb1504d5c 100644
--- a/src/soc/mediatek/mt8192/mt6315.c
+++ b/src/soc/mediatek/mt8192/mt6315.c
@@ -300,8 +300,3 @@ void mt6315_init(void)
mt6315_wdt_enable(MT6315_GPU);
mt6315_init_setting();
}
-
-void mt6315_romstage_init(void)
-{
- init_pmif_arb();
-}
diff --git a/src/soc/mediatek/mt8192/mt6359p.c b/src/soc/mediatek/mt8192/mt6359p.c
index e9dadc0d74..453481290f 100644
--- a/src/soc/mediatek/mt8192/mt6359p.c
+++ b/src/soc/mediatek/mt8192/mt6359p.c
@@ -564,8 +564,3 @@ void mt6359p_init(void)
pmic_protect_key_setting(true);
pmic_wk_vs2_voter_setting();
}
-
-void mt6359p_romstage_init(void)
-{
- init_pmif_arb();
-}