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authorXi Chen <xixi.chen@mediatek.com>2020-10-20 17:55:14 +0800
committerHung-Te Lin <hungte@chromium.org>2020-10-23 04:01:35 +0000
commit3827f56fe1f97c4dc19af94782ed9cce89cec723 (patch)
tree361e20bfdd2f183e94f6f0834389c57d8ad1750e /src/soc/mediatek
parent3398f3152cf005d1e8219feacac1e1ec4fe50095 (diff)
downloadcoreboot-3827f56fe1f97c4dc19af94782ed9cce89cec723.tar.xz
soc/mediatek/mt8192: add dram log prefix
1 Add dram log prefix: [MEM] 2 Print error code when memtest fails. Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Change-Id: I6c53c9cecf5996227a3e343fc703b9880d9afeac Reviewed-on: https://review.coreboot.org/c/coreboot/+/46585 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8192/memory.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/mediatek/mt8192/memory.c b/src/soc/mediatek/mt8192/memory.c
index b5363b0712..5820fbf294 100644
--- a/src/soc/mediatek/mt8192/memory.c
+++ b/src/soc/mediatek/mt8192/memory.c
@@ -15,14 +15,14 @@ static int mt_mem_test(const struct dramc_data *dparam)
const struct ddr_base_info *ddr_info = &dparam->ddr_info;
for (u8 rank = RANK_0; rank < ddr_info->support_ranks; rank++) {
- int i = complex_mem_test(addr, 0x2000);
+ int result = complex_mem_test(addr, 0x2000);
- printk(BIOS_DEBUG, "[MEM] complex R/W mem test %s\n",
- (i == 0) ? "pass" : "fail");
-
- if (i != 0) {
- printk(BIOS_ERR, "DRAM memory test failed\n");
+ if (result != 0) {
+ printk(BIOS_ERR,
+ "[MEM] complex R/W mem test failed: %d\n", result);
return -1;
+ } else {
+ printk(BIOS_DEBUG, "[MEM] complex R/W mem test passed\n");
}
addr += ddr_info->rank_size[rank];