diff options
| author | Julius Werner <jwerner@chromium.org> | 2020-12-30 15:51:10 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-19 08:39:26 +0000 |
| commit | 82d16b150ce3287f4e9f33e86bdde32bc455b193 (patch) | |
| tree | f3110d34e3eebb4a57ca429152c1262e65e9f2f4 /src/soc/mediatek | |
| parent | 422501fb14780090527c9a45bcca6628cd6bba71 (diff) | |
| download | coreboot-82d16b150ce3287f4e9f33e86bdde32bc455b193.tar.xz | |
memlayout: Store region sizes as separate symbols
This patch changes the memlayout macro infrastructure so that the size
of a region "xxx" (i.e. the distance between the symbols _xxx and _exxx)
is stored in a separate _xxx_size symbol. This has the advantage that
region sizes can be used inside static initializers, and also saves an
extra subtraction at runtime. Since linker symbols can only be treated
as addresses (not as raw integers) by C, retain the REGION_SIZE()
accessor macro to hide the necessary typecast.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ifd89708ca9bd3937d0db7308959231106a6aa373
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
| -rw-r--r-- | src/soc/mediatek/mt8173/memlayout.ld | 4 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8183/memlayout.ld | 4 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8192/include/soc/memlayout.ld | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/mediatek/mt8173/memlayout.ld b/src/soc/mediatek/mt8173/memlayout.ld index d9a6d8312d..092cfdf2bf 100644 --- a/src/soc/mediatek/mt8173/memlayout.ld +++ b/src/soc/mediatek/mt8173/memlayout.ld @@ -9,8 +9,8 @@ * It will be returned before starting the ramstage. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. */ -#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) -#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) #define DRAM_DMA(addr, size) \ REGION(dram_dma, addr, size, 4K) \ diff --git a/src/soc/mediatek/mt8183/memlayout.ld b/src/soc/mediatek/mt8183/memlayout.ld index a549274376..0acd174c84 100644 --- a/src/soc/mediatek/mt8183/memlayout.ld +++ b/src/soc/mediatek/mt8183/memlayout.ld @@ -9,8 +9,8 @@ * It will be returned before starting the ramstage. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. */ -#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) -#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) #define DRAM_INIT_CODE(addr, size) \ REGION(dram_init_code, addr, size, 4) diff --git a/src/soc/mediatek/mt8192/include/soc/memlayout.ld b/src/soc/mediatek/mt8192/include/soc/memlayout.ld index 6f964f2331..2624d82c55 100644 --- a/src/soc/mediatek/mt8192/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8192/include/soc/memlayout.ld @@ -9,8 +9,8 @@ * It will be returned before starting the ramstage. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. */ -#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) -#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) #define DRAM_INIT_CODE(addr, size) \ REGION(dram_init_code, addr, size, 64K) |