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author | Xi Chen <xixi.chen@mediatek.com> | 2020-10-21 15:41:06 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2020-10-26 03:04:37 +0000 |
commit | 71e86d66a6633e94f0cf3077570ffbbd26e6e629 (patch) | |
tree | c9ab68978351ead221ad8e70893a4c19d8b15199 /src/soc/mediatek | |
parent | 6871d51125dcf7c091c9c461c3e9b8bfa681217d (diff) | |
download | coreboot-71e86d66a6633e94f0cf3077570ffbbd26e6e629.tar.xz |
soc/mediatek/mt8192: update descriptions for dram config
MEMORY_TEST, MT8192_DRAM_DVFS
Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I2e714c0ce588e48bbe6bd8e59c03bdb69dea01e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46616
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r-- | src/soc/mediatek/mt8192/Kconfig | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig index 18d9d41ef3..8425005a86 100644 --- a/src/soc/mediatek/mt8192/Kconfig +++ b/src/soc/mediatek/mt8192/Kconfig @@ -33,10 +33,16 @@ config MT8192_DRAM_DVFS bool default n help - This options enables DRAM calibration with multiple frequencies (low, - medium and high) for DVFS feature. + This option enables DRAM calibration with multiple frequencies (low, + medium and high frequency groups, with total 7 frequencies) for DVFS + feature. All supported data rates are: 800, 1200, 1600, 1866, 2400, + 3200, 4266. config MEMORY_TEST bool default y + help + This option enables memory basic compare test to verify the DRAM read + or write is as expected. + endif |