diff options
| author | Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> | 2019-08-29 14:56:25 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-01 15:11:29 +0000 |
| commit | 9168ab0077a15d09c5a313359fa5391b29558dd4 (patch) | |
| tree | 17ef912d55fb2645750633462730fe27b224cf32 /src/soc/mediatek | |
| parent | 6e079dc120a4aa95a25cfe536d4b1acd178918fd (diff) | |
| download | coreboot-9168ab0077a15d09c5a313359fa5391b29558dd4.tar.xz | |
mediatek/mt8183: Allow modifying vcore voltage
Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.
BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter
Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33391
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
| -rw-r--r-- | src/soc/mediatek/mt8183/include/soc/mt6358.h | 5 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8183/mt6358.c | 21 |
2 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h index 19ab5e106e..bb5f019433 100644 --- a/src/soc/mediatek/mt8183/include/soc/mt6358.h +++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h @@ -25,6 +25,9 @@ enum { PMIC_TOP_TMA_KEY = 0x03a8, PMIC_PWRHOLD = 0x0a08, PMIC_CPSDSA4 = 0x0a2e, + PMIC_VCORE_OP_EN = 0x1490, + PMIC_VCORE_DBG0 = 0x149e, + PMIC_VCORE_VOSEL = 0x14aa, PMIC_VDRAM1_VOSEL_SLEEP = 0x160a, PMIC_SMPS_ANA_CON0 = 0x1808, PMIC_VSIM2_ANA_CON0 = 0x1e30, @@ -41,5 +44,7 @@ void mt6358_init(void); void pmic_set_power_hold(bool enable); void pmic_set_vsim2_cali(unsigned int vsim2_mv); void pmic_init_scp_voltage(void); +unsigned int pmic_get_vcore_vol(void); +void pmic_set_vcore_vol(unsigned int vcore_uv); #endif /* __SOC_MEDIATEK_MT6358_H__ */ diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index fa928cbcf6..3600b6a3de 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -805,6 +805,27 @@ void pmic_set_vsim2_cali(unsigned int vsim2_mv) pwrap_write_field(PMIC_VSIM2_ANA_CON0, cali_mv / 10, 0xF, 0); } +unsigned int pmic_get_vcore_vol(void) +{ + unsigned int vol_reg; + + vol_reg = pwrap_read_field(PMIC_VCORE_DBG0, 0x7F, 0); + return 500000 + vol_reg * 6250; +} + +void pmic_set_vcore_vol(unsigned int vcore_uv) +{ + unsigned int vol_reg; + + assert(vcore_uv >= 500000); + assert(vcore_uv <= 1100000); + + vol_reg = (vcore_uv - 500000) / 6250; + + pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0); + pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0); +} + static void pmic_wdt_set(void) { /* [5]=1, RG_WDTRSTB_DEB */ |