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authorWeiyi Lu <weiyi.lu@mediatek.com>2020-08-19 10:53:26 +0800
committerHung-Te Lin <hungte@chromium.org>2020-12-16 06:26:51 +0000
commit92d59931c42df35358dbeaa090d511d340cb1431 (patch)
treeef644bda999279d951596ea438700f2352b013dc /src/soc/mediatek
parente501f9b3ddf9b90708d3b876a8cae7d36ecbb8ce (diff)
downloadcoreboot-92d59931c42df35358dbeaa090d511d340cb1431.tar.xz
soc/mediatek/mt8192: Initialize audio pll tuner frequency
Add AUDPLL TUNER init code. TEST=Boots correctly on MT8192EVB. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Change-Id: I1f1b5b55a0a16d42311b16b89b15b31e1aa04670 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8192/pll.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/pll.c b/src/soc/mediatek/mt8192/pll.c
index 11750d20a3..24cfafd8d6 100644
--- a/src/soc/mediatek/mt8192/pll.c
+++ b/src/soc/mediatek/mt8192/pll.c
@@ -392,6 +392,10 @@ void mt_pll_init(void)
for (i = 0; i < ARRAY_SIZE(rates); i++)
pll_set_rate(&plls[rates[i].id], rates[i].rate);
+ /* AUDPLL Tuner Frequency Set */
+ write32(&mtk_apmixed->apll1_tuner_con0, read32(&mtk_apmixed->apll1_con2) + 1);
+ write32(&mtk_apmixed->apll2_tuner_con0, read32(&mtk_apmixed->apll2_con2) + 1);
+
/* xPLL Frequency Enable */
for (i = 0; i < APMIXED_PLL_MAX; i++) {
if (i == APMIXED_USBPLL)