diff options
author | TingHan.Shen <tinghan.shen@mediatek.com> | 2020-11-20 14:42:23 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-10 14:05:27 +0000 |
commit | be404c22aa8d9675d1b4b62fd188aee5aef01f88 (patch) | |
tree | 106901eae8c15dfc66892ce28580e18866ecd5f9 /src/soc/mediatek | |
parent | 916e2efad4daaf6572107ed2e9b669e434eb5629 (diff) | |
download | coreboot-be404c22aa8d9675d1b4b62fd188aee5aef01f88.tar.xz |
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in
secure domain. The initialization flow is to load SSPM firmware to
its SRAM space and then enable.
Signed-off-by: TingHan.Shen <tinghan.shen@mediatek.com>
Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47786
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r-- | src/soc/mediatek/mt8192/Kconfig | 6 | ||||
-rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/mediatek/mt8192/include/soc/addressmap.h | 2 | ||||
-rw-r--r-- | src/soc/mediatek/mt8192/include/soc/sspm.h | 14 | ||||
-rw-r--r-- | src/soc/mediatek/mt8192/soc.c | 2 | ||||
-rw-r--r-- | src/soc/mediatek/mt8192/sspm.c | 26 |
6 files changed, 52 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig index 67e5a52008..7373fe1579 100644 --- a/src/soc/mediatek/mt8192/Kconfig +++ b/src/soc/mediatek/mt8192/Kconfig @@ -69,4 +69,10 @@ config SPM_FIRMWARE help The file name of the MediaTek SPM firmware. +config SSPM_FIRMWARE + string + default "sspm.bin" + help + The file name of the MediaTek SSPM firmware. + endif diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index c02eabc1e1..bd6fe27377 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -46,6 +46,7 @@ ramstage-y += ../common/mmu_operations.c mmu_operations.c ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += soc.c ramstage-y += spm.c +ramstage-y += sspm.c ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c ramstage-y += ../common/usb.c usb.c @@ -56,6 +57,7 @@ mcu-firmware-files := \ $(CONFIG_DPM_DM_FIRMWARE) \ $(CONFIG_DPM_PM_FIRMWARE) \ $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_SSPM_FIRMWARE) \ $(CONFIG_SPM_FIRMWARE) $(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 2e8ac9e715..829712926d 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -27,6 +27,8 @@ enum { PMIF_SPMI_BASE = IO_PHYS + 0x00027000, PMICSPI_MST_BASE = IO_PHYS + 0x00028000, SPMI_MST_BASE = IO_PHYS + 0x00029000, + SSPM_SRAM_BASE = IO_PHYS + 0x00400000, + SSPM_CFG_BASE = IO_PHYS + 0x00440000, DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000, DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000, DPM_CFG_BASE = IO_PHYS + 0x00940000, diff --git a/src/soc/mediatek/mt8192/include/soc/sspm.h b/src/soc/mediatek/mt8192/include/soc/sspm.h new file mode 100644 index 0000000000..5749fa4be3 --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/sspm.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8192_SSPM_H +#define SOC_MEDIATEK_MT8192_SSPM_H + +#include <soc/addressmap.h> +#include <types.h> + +struct mt8192_sspm_regs { + u32 sw_rstn; +}; +static struct mt8192_sspm_regs *const mt8192_sspm = (void *)SSPM_CFG_BASE; +void sspm_init(void); +#endif /* SOC_MEDIATEK_MT8192_SSPM_H */ diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 00a57d2f37..bf9e8e794e 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -4,6 +4,7 @@ #include <soc/emi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> +#include <soc/sspm.h> #include <symbols.h> static void soc_read_resources(struct device *dev) @@ -15,6 +16,7 @@ static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); mcupm_init(); + sspm_init(); } static struct device_operations soc_ops = { diff --git a/src/soc/mediatek/mt8192/sspm.c b/src/soc/mediatek/mt8192/sspm.c new file mode 100644 index 0000000000..b36e0df6f9 --- /dev/null +++ b/src/soc/mediatek/mt8192/sspm.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/mmio.h> +#include <soc/mcu_common.h> +#include <soc/sspm.h> +#include <soc/symbols.h> + +static void reset_sspm(struct mtk_mcu *mcu) +{ + write32(&mt8192_sspm->sw_rstn, 0x1); +} + +static struct mtk_mcu sspm = { + .firmware_name = CONFIG_SSPM_FIRMWARE, + .run_address = (void *)SSPM_SRAM_BASE, + .reset = reset_sspm, +}; + +void sspm_init(void) +{ + sspm.load_buffer = _dram_dma; + sspm.buffer_size = REGION_SIZE(dram_dma); + + mtk_init_mcu(&sspm); +} |