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authorAaron Durbin <adurbin@chromium.org>2020-01-23 11:45:30 -0700
committerAaron Durbin <adurbin@chromium.org>2020-01-28 14:44:37 +0000
commitfc7b953366b776aa3eaaf0539af06086facda14e (patch)
tree52ae47be248bed559c27128e97a51d24b8d3d3c6 /src/soc/mediatek
parent98eeb961353d187a26085a07889bd0414cdaa910 (diff)
downloadcoreboot-fc7b953366b776aa3eaaf0539af06086facda14e.tar.xz
drivers/spi/spi_flash: remove spi flash names
The names of each spi flash cause quite a bit of bloat in the text size of each stage/program. Remove the name entirely from spi flash in order to reduce overhead. In order to pack space as closely as possible the previous 32-bit id and mask were split into 2 16-bit ids and masks. On Chrome OS build of Aleena there's a savings of >2.21KiB in each of verstage, romstage, and ramstage. Change-Id: Ie98f7e1c7d116c5d7b4bf78605f62fee89dee0a5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8173/flash_controller.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8173/flash_controller.c b/src/soc/mediatek/mt8173/flash_controller.c
index b491a41efd..9e459834f5 100644
--- a/src/soc/mediatek/mt8173/flash_controller.c
+++ b/src/soc/mediatek/mt8173/flash_controller.c
@@ -240,7 +240,6 @@ int mtk_spi_flash_probe(const struct spi_slave *spi,
write32(&mt8173_nor->wrprot, SFLASH_COMMAND_ENABLE);
memcpy(&flash->spi, spi, sizeof(*spi));
- flash->name = "mt8173 flash controller";
flash->sector_size = 0x1000;
flash->erase_cmd = SECTOR_ERASE_CMD;
flash->size = CONFIG_ROM_SIZE;