diff options
| author | Yu-Ping Wu <yupingso@chromium.org> | 2019-10-17 13:38:32 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-21 09:14:47 +0000 |
| commit | 46009ea4ccf861754290321936eb0fb7769ba772 (patch) | |
| tree | 77d7b8bce7ca3815f553b91f7201a0cf16658726 /src/soc/mediatek | |
| parent | 998a3cc0dab5e73ae2a169aeb04df6b4db4f968a (diff) | |
| download | coreboot-46009ea4ccf861754290321936eb0fb7769ba772.tar.xz | |
soc/mediatek/mt8183: Force DRAM retraining if hotkey pressed
Similar to MRC cache on x86 platforms, when a hotkey is pressed during
boot, the calibration data cache saved in the flash will be cleared,
consequently triggering DRAM retraining (full calibration) in the next
boot.
BRANCH=kukui
BUG=b:139099592
TEST=emerge-kukui coreboot
Change-Id: I2f9225f359e1fe5733e8e1c48b396aaeeb9a58ab
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
| -rw-r--r-- | src/soc/mediatek/mt8183/memory.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c index 2e6391339c..2a4ebbdd1f 100644 --- a/src/soc/mediatek/mt8183/memory.c +++ b/src/soc/mediatek/mt8183/memory.c @@ -169,6 +169,12 @@ void mt_mem_init(struct dramc_param_ops *dparam_ops) /* Load calibration params from flash and run fast calibration */ if (recovery_mode) { printk(BIOS_WARNING, "Skip loading cached calibration data\n"); + if (vboot_recovery_mode_memory_retrain()) { + printk(BIOS_WARNING, "Retrain memory in next boot\n"); + /* Use 0xFF as erased flash data. */ + memset(dparam, 0xff, sizeof(*dparam)); + dparam_ops->write_to_flash(dparam); + } } else if (dparam_ops->read_from_flash(dparam)) { printk(BIOS_INFO, "DRAM-K: Fast Calibration\n"); if (dram_run_fast_calibration(dparam, config) == 0) { |