summaryrefslogtreecommitdiff
path: root/src/soc/mediatek
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2016-08-11 14:40:09 -0500
committerMartin Roth <martinroth@google.com>2016-08-18 22:04:34 +0200
commit08e842c0d10c69b8fc07f6b00ea4dbeb85ac6e58 (patch)
tree862eae8b485ccb5c72fadeb422ac98df26ecb3bf /src/soc/mediatek
parent240853bf25cbff39f0099dd6ed3fe0bfa75c9d0c (diff)
downloadcoreboot-08e842c0d10c69b8fc07f6b00ea4dbeb85ac6e58.tar.xz
Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS
Provide a default value of 0 in drivers/spi as there weren't default values aside from specific mainboards and arch/x86. Remove any default 0 values while noting to keep the option's default to 0. BUG=chrome-os-partner:56151 Change-Id: If9ef585e011a46b5cd152a03e41d545b36355a61 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16192 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8173/spi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c
index dc674f371e..c35b1fc507 100644
--- a/src/soc/mediatek/mt8173/spi.c
+++ b/src/soc/mediatek/mt8173/spi.c
@@ -170,7 +170,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
spi_sw_reset(eslave->regs);
return &eslave->slave;
- case CONFIG_BOOT_MEDIA_SPI_BUS:
+ case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS:
slave.bus = bus;
slave.cs = cs;
slave.force_programmer_specific = 1;