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authorGabe Black <gabeblack@google.com>2013-10-03 04:35:01 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-08-19 22:46:52 +0200
commit08d5a89fd0a64740b81d1319551ac580068d835d (patch)
tree0d79f67693b6672f75d216c4fa2b1b57b4848f3a /src/soc/nvidia/tegra/pingroup.h
parentf40785c0c26c481fa19345dd5467045cf52876c5 (diff)
downloadcoreboot-08d5a89fd0a64740b81d1319551ac580068d835d.tar.xz
tegra124: Implement driver code for the pinmux, pingroup controls, and GPIOs.
The pins on tegra are controlled by three different units, the pinmux, the pin group controls, and the GPIO banks. Each of these units controls some aspect of the pins, and they layer together and interact in interesting ways. By default, the GPIOs are configured to pass through the special purpose IO that the pinmux is configured to and so can be ignored unless a GPIO is needed. The pinmux controls which special purpose signal passes through, along with pull ups, downs, and whether the output is tristated. The pingroup controls change the parameters of a group of pins which all have to do with a related function unit. The enum which holds constants related to the pinmux is relatively involved and may not be entirely complete or correct due to slightly inconsistent, incomplete, or missing documentation related to the pinmux. Considerable effort has been made to make it as accurate as possible. It includes a constant which is the index into the pinmux control registers for that pin, what each of the functions supported by that pin are, and which GPIO it corresponds to. The GPIO constant is named after the GPIO and is the pinmux register index for the pin for that GPIO. That way, when you need to turn on a GPIO, you can use that constant along with the pinmux manipulating functions to enable its tristate and pull up/down mode in addition to setting up the GPIO controls. Also, while in general I prefer not to use macros or the preprocessor when writing C code, in this case the set of constants in the enums was too large and cumbersome to manage without them. Since they're being used to construct a table in a straightforward way, hopefully their negative aspects will be minimized. In addition to the low level functions in each driver, the GPIO code also includes some high level functions to set up input or output GPIOs since that will probably be a very common thing to want to do. Old-Change-Id: I48efa58d1b5520c0367043cef76b6d3a7a18530d Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171806 Reviewed-by: Ronald Minnich <rminnich@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 5cd9f17fe0196d13c1e10b8cde0f2d3989b5ae1a) tegra124: Add base address for the pinmux and pingroup registers. There weren't any constants for the pinmux or pingroup registers in the address map header. Old-Change-Id: I52b9042c7506cab0bedd7a734f346cc9fe4ac3fe Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/172081 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 79b61016bfd702b0ea5221658305d8bd359f4f62) Squashed two related commits. Change-Id: Ifeb6085128bd53f0ef5f82c930eda66a2b59499b Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6702 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia/tegra/pingroup.h')
-rw-r--r--src/soc/nvidia/tegra/pingroup.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra/pingroup.h b/src/soc/nvidia/tegra/pingroup.h
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+++ b/src/soc/nvidia/tegra/pingroup.h
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+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_NVIDIA_TEGRA_PINGROUP_H__
+#define __SOC_NVIDIA_TEGRA_PINGROUP_H__
+
+#include <stdint.h>
+
+void pingroup_set_config(int group_index, uint32_t config);
+uint32_t pingroup_get_config(int group_index);
+
+enum {
+ PINGROUP_HSM = 1 << 2,
+ PINGROUP_SCHMT = 1 << 3,
+ PINGROUP_LPMD_SHIFT = 4,
+ PINGROUP_LPMD_MASK = 3 << 4,
+ PINGROUP_DRVDN_SHIFT = 12,
+ PINGROUP_DRVDN_MASK = 0x7f << 12,
+ PINGROUP_DRVUP_SHIFT = 20,
+ PINGROUP_DRVUP_MASK = 0x7f << 20,
+ PINGROUP_SLWR_SHIFT = 28,
+ PINGROUP_SLWR_MASK = 0x3 << 28,
+ PINGROUP_SLWF_SHIFT = 30,
+ PINGROUP_SLWF_MASK = 0x3 << 30
+};
+
+#endif /* __SOC_NVIDIA_TEGRA_PINGROUP_H__ */