diff options
| author | Gabe Black <gabeblack@google.com> | 2014-03-03 16:26:11 -0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-13 06:24:54 +0100 |
| commit | 317850348e4a16b5b7d762941351e669962a5035 (patch) | |
| tree | 26536fc343bd0b0bdfe2dc1a2ae7e90cff2977bf /src/soc/nvidia/tegra124/Kconfig | |
| parent | 6940c0da9bab9c0842228053767ac97316dd7c53 (diff) | |
| download | coreboot-317850348e4a16b5b7d762941351e669962a5035.tar.xz | |
tegra124: Make the PLLX frequency selectable by model.
The PLLX provides the clock for the main cores which can run at different max
frequencies depending on the specific model of Tegra124. This change makes it
possible to select a model which will, in turn, select a frequency for PLLX.
The default is 2GHz which is the lowest maximum frequency.
BUG=chrome-os-partner:25467
TEST=Booted on nyan rev1. Verified that the selected PLLX frequency was 2GHz.
With a change that selects the right model for nyan, verified that the
corresponding frequency was selected.
BRANCH=None
Original-Change-Id: Iee3a615083dee97ad659ff41cbf867af2a0c325d
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/188602
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 1282015048420a518e6c6959ce982be70378211a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I448a830f3184ad1afeadbd1c2974c7a27b03a923
Reviewed-on: http://review.coreboot.org/7409
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/Kconfig')
| -rw-r--r-- | src/soc/nvidia/tegra124/Kconfig | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index 3876a9e39c..bdc4af9528 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -91,4 +91,25 @@ config CBFS_CACHE_SIZE hex "size of CBFS cache data" default 0x00018000 +config TEGRA124_MODEL_TD570D + bool "TD570D" + +config TEGRA124_MODEL_TD580D + bool "TD580D" + +config TEGRA124_MODEL_CD570M + bool "CD570M" + +config TEGRA124_MODEL_CD580M + bool "CD580M" + +# Default to 2GHz, the lowest maximum frequency. +config PLLX_KHZ + int + default 2000000 if TEGRA124_MODEL_TD570D + default 2300000 if TEGRA124_MODEL_TD580D + default 2100000 if TEGRA124_MODEL_CD570M + default 2300000 if TEGRA124_MODEL_CD580M + default 2000000 + endif |