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author | Daisuke Nojiri <dnojiri@chromium.org> | 2014-06-19 19:09:47 -0700 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-13 21:33:57 +0100 |
commit | 320647abdad1ea6cdceb834933507677020ea388 (patch) | |
tree | bc4a6f6bd5794078d117950110a162f298d1f502 /src/soc/nvidia/tegra124/Makefile.inc | |
parent | 337de4c0e539d3d055b916f40fc44067d1a13cd7 (diff) | |
download | coreboot-320647abdad1ea6cdceb834933507677020ea388.tar.xz |
vboot2: add verstage
Verstage will host vboot2 for firmware verification.
It's a stage in the sense that it has its own set of toolchains, compiler flags,
and includes. This allows us to easily add object files as needed. But
it's directly linked to bootblock. This allows us to avoid code
duplication for stage loading and jumping (e.g. cbfs driver) for the boards
where bootblock has to run in a different architecture (e.g. Tegra124).
To avoid name space conflict, verstage symbols are prefixed with verstage_.
TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze.
BUG=None
BRANCH=none
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac
Original-Reviewed-on: https://chromium-review.googlesource.com/204376
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I42b2b3854a24ef6cda2316eb741ca379f41516e0
Reviewed-on: http://review.coreboot.org/8159
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia/tegra124/Makefile.inc')
-rw-r--r-- | src/soc/nvidia/tegra124/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc index 792bb9992b..b306412956 100644 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ b/src/soc/nvidia/tegra124/Makefile.inc @@ -20,6 +20,8 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c endif +verstage-y += verstage.c + romstage-y += cbfs.c romstage-y += cbmem.c romstage-y += clock.c |