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authorYen Lin <yelin@nvidia.com>2014-07-10 11:46:10 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-02-17 01:16:47 +0100
commit5840626cec3db3262d506c0f90d062b8c602f3ea (patch)
tree09c37ba7f65dab4271228f45f210cd248d2052be /src/soc/nvidia/tegra124/bootblock.c
parentb365530bb6341cad601532e43fc899f56ba57acb (diff)
downloadcoreboot-5840626cec3db3262d506c0f90d062b8c602f3ea.tar.xz
T124: perform ram_repair when CPU rail is powered on in coldboot
This patch is to perform software triggered RAM re-repair in the cold boot path. "RAM" actually refers to the CPU cache here (yeah, I know, but that's how the manuals call it). This is some magic hardware thing that must be done every time after applying power to the main CPU cores or their cache may have random failures in some very rare cases. BUG=chrome-os-partner:30430 BRANCH=nyan TEST=run cold reboot test on nyan. Original-Signed-off-by: Yen Lin <yelin@nvidia.com> Original-Change-Id: I87869431e80e7bc66948a7f67f35e5b907993765 Original-Reviewed-on: https://chromium-review.googlesource.com/207362 Original-Tested-by: Yen Lin <yelin@nvidia.com> Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Yen Lin <yelin@nvidia.com> (cherry picked from commit d999f5ecc31d90c8dce1dd91533bc34ffd3c03f2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Iaee1d7f9fa8856f26d7ead70eaeeff9d80dbb181 Reviewed-on: http://review.coreboot.org/8415 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/bootblock.c')
-rw-r--r--src/soc/nvidia/tegra124/bootblock.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c
index 59001491ff..aec914532e 100644
--- a/src/soc/nvidia/tegra124/bootblock.c
+++ b/src/soc/nvidia/tegra124/bootblock.c
@@ -79,6 +79,10 @@ void main(void)
clock_cpu0_config(entry);
power_enable_and_ungate_cpu();
+
+ /* Repair ram on cluster0 and cluster1 after CPU is powered on. */
+ ram_repair();
+
clock_cpu0_remove_reset();
clock_halt_avp();