diff options
| author | Gabe Black <gabeblack@google.com> | 2014-03-26 21:43:53 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-14 07:28:18 +0100 |
| commit | 6541b283b056fc7f8b0752508c8b3babb5b53e33 (patch) | |
| tree | bf27564d4406c5a232754c72c8d76b510c3436d7 /src/soc/nvidia/tegra124/i2c.c | |
| parent | 8253bd912ae4cd65ac0aa9ecaebb3aa7efd46cb0 (diff) | |
| download | coreboot-6541b283b056fc7f8b0752508c8b3babb5b53e33.tar.xz | |
tegra124: i2c: Reset the controller when there's an error.
This is the only way to clear the error bits in the controller. Without
clearing them, every future transaction will look like it failed.
BUG=chrome-os-partner:27220
TEST=Built and booted on nyan with the TPM frequency turned up to 400 KHz.
BRANCH=None
Original-Change-Id: Ib654e60ec3039ad9f5f96aa7288d3d877e5c843a
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/191811
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 7b19a095652f1561590dcca922b9f8c308d7de9d)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I301b6694cc521601b618973de891e4ed44c6a97d
Reviewed-on: http://review.coreboot.org/7460
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia/tegra124/i2c.c')
| -rw-r--r-- | src/soc/nvidia/tegra124/i2c.c | 36 |
1 files changed, 32 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra124/i2c.c b/src/soc/nvidia/tegra124/i2c.c index b54230b171..a7eee686b0 100644 --- a/src/soc/nvidia/tegra124/i2c.c +++ b/src/soc/nvidia/tegra124/i2c.c @@ -18,10 +18,38 @@ */ #include <soc/addressmap.h> +#include <soc/clock.h> #include <soc/nvidia/tegra/i2c.h> -void * const tegra_i2c_bases[TEGRA_I2C_BASE_COUNT] = { - (void *)TEGRA_I2C_BASE, (void *)TEGRA_I2C2_BASE, - (void *)TEGRA_I2C3_BASE, (void *)TEGRA_I2C4_BASE, - (void *)TEGRA_I2C5_BASE, (void *)TEGRA_I2C6_BASE +struct tegra_i2c_bus_info tegra_i2c_info[] = { + { + .base = (void *)TEGRA_I2C_BASE, + .reset_bit = CLK_L_I2C1, + .reset_func = &clock_reset_l + }, + { + .base = (void *)TEGRA_I2C2_BASE, + .reset_bit = CLK_H_I2C2, + .reset_func = &clock_reset_h + }, + { + .base = (void *)TEGRA_I2C3_BASE, + .reset_bit = CLK_U_I2C3, + .reset_func = &clock_reset_u + }, + { + .base = (void *)TEGRA_I2C4_BASE, + .reset_bit = CLK_V_I2C4, + .reset_func = &clock_reset_v + }, + { + .base = (void *)TEGRA_I2C5_BASE, + .reset_bit = CLK_H_I2C5, + .reset_func = &clock_reset_h + }, + { + .base = (void *)TEGRA_I2C6_BASE, + .reset_bit = CLK_X_I2C6, + .reset_func = &clock_reset_x + } }; |