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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-13 02:20:27 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-13 19:45:59 +0000 |
| commit | 6a00113de8b9060a7227bcfa79b3786e3e592a33 (patch) | |
| tree | 467f5653272ed2d16f6d8033ed8cd0e7391fb426 /src/soc/nvidia/tegra124/include | |
| parent | 9f244a5494192707bfbb72e60f17411e9a35434a (diff) | |
| download | coreboot-6a00113de8b9060a7227bcfa79b3786e3e592a33.tar.xz | |
Rename __attribute__((packed)) --> __packed
Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))
Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/include')
| -rw-r--r-- | src/soc/nvidia/tegra124/include/soc/clk_rst.h | 4 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra124/include/soc/dma.h | 5 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra124/include/soc/emc.h | 3 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra124/include/soc/spi.h | 3 |
4 files changed, 10 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/clk_rst.h b/src/soc/nvidia/tegra124/include/soc/clk_rst.h index f7d78eee17..165b823145 100644 --- a/src/soc/nvidia/tegra124/include/soc/clk_rst.h +++ b/src/soc/nvidia/tegra124/include/soc/clk_rst.h @@ -14,8 +14,10 @@ #ifndef _TEGRA124_CLK_RST_H_ #define _TEGRA124_CLK_RST_H_ +#include <compiler.h> + /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */ -struct __attribute__ ((__packed__)) clk_rst_ctlr { +struct __packed clk_rst_ctlr { u32 rst_src; /* _RST_SOURCE, 0x000 */ u32 rst_dev_l; /* _RST_DEVICES_L, 0x004 */ u32 rst_dev_h; /* _RST_DEVICES_H, 0x008 */ diff --git a/src/soc/nvidia/tegra124/include/soc/dma.h b/src/soc/nvidia/tegra124/include/soc/dma.h index 53edc92369..4d3e9f6608 100644 --- a/src/soc/nvidia/tegra124/include/soc/dma.h +++ b/src/soc/nvidia/tegra124/include/soc/dma.h @@ -17,6 +17,7 @@ #define __NVIDIA_TEGRA124_DMA_H__ #include <inttypes.h> +#include <compiler.h> #include <soc/addressmap.h> /* @@ -66,7 +67,7 @@ struct apb_dma { u32 chan_wt_reg2; /* 0x4c */ u32 chan_wr_reg3; /* 0x50 */ u32 channel_swid1; /* 0x54 */ -} __attribute__((packed)); +} __packed; check_member(apb_dma, channel_swid1, 0x54); /* @@ -164,7 +165,7 @@ struct apb_dma_channel_regs { u32 apb_seq; /* 0x1c */ u32 wcount; /* 0x20 */ u32 word_transfer; /* 0x24 */ -} __attribute__((packed)); +} __packed; check_member(apb_dma_channel_regs, word_transfer, 0x24); struct apb_dma_channel { diff --git a/src/soc/nvidia/tegra124/include/soc/emc.h b/src/soc/nvidia/tegra124/include/soc/emc.h index bae0068e4c..f1ff7f320d 100644 --- a/src/soc/nvidia/tegra124/include/soc/emc.h +++ b/src/soc/nvidia/tegra124/include/soc/emc.h @@ -17,6 +17,7 @@ #include <stddef.h> #include <stdint.h> +#include <compiler.h> enum { EMC_PIN_RESET_MASK = 1 << 8, @@ -313,7 +314,7 @@ struct tegra_emc_regs { uint32_t puterm_width; /* 0x56c */ uint32_t bgbias_ctl0; /* 0x570 */ uint32_t puterm_adj; /* 0x574 */ -} __attribute__((packed)); +} __packed; check_member(tegra_emc_regs, puterm_adj, 0x574); diff --git a/src/soc/nvidia/tegra124/include/soc/spi.h b/src/soc/nvidia/tegra124/include/soc/spi.h index a9ea4eadf9..c56b302339 100644 --- a/src/soc/nvidia/tegra124/include/soc/spi.h +++ b/src/soc/nvidia/tegra124/include/soc/spi.h @@ -17,6 +17,7 @@ #include <spi-generic.h> #include <soc/dma.h> #include <stddef.h> +#include <compiler.h> struct tegra_spi_regs { u32 command1; /* 0x000: SPI_COMMAND1 */ @@ -34,7 +35,7 @@ struct tegra_spi_regs { u32 rsvd2[31]; /* 0x10c-0x187 reserved */ u32 rx_fifo; /* 0x188: SPI_FIFO2 */ u32 spare_ctl; /* 0x18c: SPI_SPARE_CTRL */ -} __attribute__((packed)); +} __packed; check_member(tegra_spi_regs, spare_ctl, 0x18c); enum spi_xfer_mode { |