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author | Andrew Bresticker <abrestic@chromium.org> | 2014-03-04 11:06:13 -0800 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-13 06:25:39 +0100 |
commit | 25bf7757b7ed4f571f7f5d2a26ed9d3fea4e7e2b (patch) | |
tree | 6c8edbabe5e5ee366f29a5b2f33bc7fbe59b8c8a /src/soc/nvidia/tegra124/lp0 | |
parent | 4fa158c44fa1a6f6d6d397e4b6c75c50f1b72e33 (diff) | |
download | coreboot-25bf7757b7ed4f571f7f5d2a26ed9d3fea4e7e2b.tar.xz |
tegra124: fix PLLU parameters
Fix the PLLU parameters to match the recommended values from the TRM,
and the values used by the kernel and LP0 blob. This includes adding
support for setting an LFCON value. It appears that changing the PLLU
parameters across suspend/resume causes XHCI stability issues after
resume.
BUG=chrome-os-partner:26326
TEST=XHCI works after LP0 suspend/resume on Nyan.
BRANCH=none
Original-Change-Id: Ia4af12fefeebe607803e7f2f03ee4802367b82c3
Original-Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/188752
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit bbc8d92eb462e165c2378bcb3055a3a74b47a19b)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I687d1709befc2f5dec094ee423f2ff824412996e
Reviewed-on: http://review.coreboot.org/7411
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/lp0')
0 files changed, 0 insertions, 0 deletions