summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra124/power.c
diff options
context:
space:
mode:
authorJulius Werner <jwerner@chromium.org>2019-12-02 22:03:27 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-04 14:11:17 +0000
commit55009af42c39f413c49503670ce9bc2858974962 (patch)
tree099e9728bfe8066999de4d7a30021eb10bd71d12 /src/soc/nvidia/tegra124/power.c
parent1c371572188a90ea16275460dd4ab6bf9966350b (diff)
downloadcoreboot-55009af42c39f413c49503670ce9bc2858974962.tar.xz
Change all clrsetbits_leXX() to clrsetbitsXX()
This patch changes all existing instances of clrsetbits_leXX() to the new endian-independent clrsetbitsXX(), after double-checking that they're all in SoC-specific code operating on CPU registers and not actually trying to make an endian conversion. This patch was created by running sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g' across the codebase and cleaning up formatting a bit. Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/power.c')
-rw-r--r--src/soc/nvidia/tegra124/power.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra124/power.c b/src/soc/nvidia/tegra124/power.c
index 9f3e355ca4..3f1ee7ee95 100644
--- a/src/soc/nvidia/tegra124/power.c
+++ b/src/soc/nvidia/tegra124/power.c
@@ -93,12 +93,12 @@ int power_reset_status(void)
void ram_repair(void)
{
// Request RAM repair for cluster 0
- setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ);
+ setbits32(&flow->ram_repair, RAM_REPAIR_REQ);
// Poll for completion
while (!(read32(&flow->ram_repair) & RAM_REPAIR_STS))
;
// Request RAM repair for cluster 1
- setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ);
+ setbits32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ);
// Poll for completion
while (!(read32(&flow->ram_repair_cluster1) & RAM_REPAIR_STS))
;