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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-29 18:31:16 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 19:27:53 +0200
commit038e7247dc9705ff2d47dd90ec9a807f6feb52ba (patch)
tree8cca6a6db31d20a8e045ee5892e8f9cb8de43f8d /src/soc/nvidia/tegra124
parentf9e7d1b0ca7282a0d51313a68f90e9298c0c46c6 (diff)
downloadcoreboot-038e7247dc9705ff2d47dd90ec9a807f6feb52ba.tar.xz
src/soc: Capitalize CPU, ACPI, RAM and ROM
Change-Id: I7f0d3400126d593bad8e78f95e6b9a378463b4ce Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15963 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra124')
-rw-r--r--src/soc/nvidia/tegra124/bootblock.c2
-rw-r--r--src/soc/nvidia/tegra124/bootblock_asm.S2
-rw-r--r--src/soc/nvidia/tegra124/include/soc/sdram_param.h4
-rw-r--r--src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c2
-rw-r--r--src/soc/nvidia/tegra124/maincpu.S2
5 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c
index 2a526a7748..ce41242299 100644
--- a/src/soc/nvidia/tegra124/bootblock.c
+++ b/src/soc/nvidia/tegra124/bootblock.c
@@ -34,7 +34,7 @@ static void run_next_stage(void *entry)
power_enable_and_ungate_cpu();
- /* Repair ram on cluster0 and cluster1 after CPU is powered on. */
+ /* Repair RAM on cluster0 and cluster1 after CPU is powered on. */
ram_repair();
clock_cpu0_remove_reset();
diff --git a/src/soc/nvidia/tegra124/bootblock_asm.S b/src/soc/nvidia/tegra124/bootblock_asm.S
index 5484450f02..0391ebf1ac 100644
--- a/src/soc/nvidia/tegra124/bootblock_asm.S
+++ b/src/soc/nvidia/tegra124/bootblock_asm.S
@@ -28,7 +28,7 @@
ENTRY(_start)
/*
- * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
+ * Set the CPU to System mode with IRQ and FIQ disabled. Prefetch/Data
* aborts may happen early and crash before the abort handlers are
* installed, but at least the problem will show up near the code that
* causes it.
diff --git a/src/soc/nvidia/tegra124/include/soc/sdram_param.h b/src/soc/nvidia/tegra124/include/soc/sdram_param.h
index 2d0ba7d7c1..a67a009945 100644
--- a/src/soc/nvidia/tegra124/include/soc/sdram_param.h
+++ b/src/soc/nvidia/tegra124/include/soc/sdram_param.h
@@ -791,9 +791,9 @@ struct sdram_params {
uint32_t EmcCaTrainingTimingCntl2;
/* Set if bit 6 select is greater than bit 7 select; uses aremc.spec packet SWIZZLE_BIT6_GT_BIT7 */
uint32_t SwizzleRankByteEncode;
- /* Specifies enable and offset for patched boot rom write */
+ /* Specifies enable and offset for patched boot ROM write */
uint32_t BootRomPatchControl;
- /* Specifies data for patched boot rom write */
+ /* Specifies data for patched boot ROM write */
uint32_t BootRomPatchData;
/* Specifies the value for MC_MTS_CARVEOUT_BOM */
uint32_t McMtsCarveoutBom;
diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
index 8a0d038712..2737b282e0 100644
--- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
@@ -612,7 +612,7 @@ void lp0_resume(void)
power_on_main_cpu();
- // Perform ram repair after cpu is powered on.
+ // Perform RAM repair after CPU is powered on.
ram_repair();
clear_cpu_resets();
diff --git a/src/soc/nvidia/tegra124/maincpu.S b/src/soc/nvidia/tegra124/maincpu.S
index 11367480ad..fc32ed2637 100644
--- a/src/soc/nvidia/tegra124/maincpu.S
+++ b/src/soc/nvidia/tegra124/maincpu.S
@@ -32,7 +32,7 @@
.arm
ENTRY(maincpu_setup)
/*
- * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
+ * Set the CPU to System mode with IRQ and FIQ disabled. Prefetch/Data
* aborts may happen early and crash before the abort handlers are
* installed, but at least the problem will show up near the code that
* causes it.