diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2014-12-01 17:19:10 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-18 08:56:36 +0200 |
| commit | 23727ca424f30dc0fef3573d6ef49ccdf798e8c3 (patch) | |
| tree | 52bd10db5001c618e62c9cbaf74f02914a42a731 /src/soc/nvidia/tegra124 | |
| parent | 7c256405c35a0609dc03441f3fc698d9d578a3d6 (diff) | |
| download | coreboot-23727ca424f30dc0fef3573d6ef49ccdf798e8c3.tar.xz | |
vboot: make vboot2_verify_firmware return
this allows each board to decide what to do after firmware verification is
done. some board needs to return back to the previous stage and let the
previous stage kick off the verified stage.
this also makes it more visible what is going to happen in the verstage since
stage_exit now resides in main().
BUG=none
BRANCH=tot
TEST=booted cosmos dev board. booted blaze in normal and recovery mode.
built for all current boards.
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: I3cb466cedf2a9c2b0d48fc4b0f73f76d0714c0c7
Original-Reviewed-on: https://chromium-review.googlesource.com/232517
(cherry picked from commit 495704f36aa54ba12231d396376f01289d083f58)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: Ic20dfd3fa93849befc2b37012a5e0907fe83e8e2
Reviewed-on: http://review.coreboot.org/9702
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra124')
| -rw-r--r-- | src/soc/nvidia/tegra124/verstage.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c index 80324232a8..2d7a9530b6 100644 --- a/src/soc/nvidia/tegra124/verstage.c +++ b/src/soc/nvidia/tegra124/verstage.c @@ -19,6 +19,8 @@ #include <arch/cache.h> #include <arch/exception.h> +#include <arch/hlt.h> +#include <arch/stages.h> #include <console/console.h> #include <soc/cache.h> #include <soc/early_configs.h> @@ -47,12 +49,23 @@ static void soc_init(void) enable_cache(); } +static void verstage(void) +{ + void *entry; + + soc_init(); + early_mainboard_init(); + + entry = vboot2_verify_firmware(); + if (entry != (void *)-1) + stage_exit(entry); +} + void main(void) { asm volatile ("bl arm_init_caches" : : : "r0", "r1", "r2", "r3", "r4", "r5", "ip"); - soc_init(); - early_mainboard_init(); - vboot2_verify_firmware(); + verstage(); + hlt(); } |