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authorPaul Kocialkowski <contact@paulk.fr>2016-05-14 15:25:51 +0200
committerMartin Roth <martinroth@google.com>2016-06-28 17:54:36 +0200
commitbc141debb54c0a4b3759dce655550b2937354163 (patch)
treecfa84bfb275e25bece83c4956d2aeb4028cde0c3 /src/soc/nvidia/tegra124
parent6dfe25dc8b737e8c66f690cd3676dc0f4b96934f (diff)
downloadcoreboot-bc141debb54c0a4b3759dce655550b2937354163.tar.xz
tegra124: Actually align the framebuffer's bytes-per-line to 32
The previous change with that intent aligned the framebuffer's bytes-per-line to 64 instead of 32: commit 8957dd6b52919ed634aa502dfd5b6316a6e6e055 Author: Paul Kocialkowski <contact@paulk.fr> Date: Sun May 1 18:38:04 2016 +0200 tegra124: Align the framebuffer's bytes-per-line to 32 Change-Id: I88bba2ff355a51d42cab6a869ec1e9c534160b9c Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/14816 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra124')
-rw-r--r--src/soc/nvidia/tegra124/display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c
index 0fc15cbea9..9ec34d481f 100644
--- a/src/soc/nvidia/tegra124/display.c
+++ b/src/soc/nvidia/tegra124/display.c
@@ -334,6 +334,6 @@ void display_startup(device_t dev)
edid.mode.va = config->yres;
edid.mode.ha = config->xres;
edid_set_framebuffer_bits_per_pixel(&edid,
- config->framebuffer_bits_per_pixel, 64);
+ config->framebuffer_bits_per_pixel, 32);
set_vbe_mode_info_valid(&edid, (uintptr_t)(framebuffer_base_mb*MiB));
}