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authorNico Huber <nico.h@gmx.de>2018-10-04 23:42:42 +0200
committerNico Huber <nico.h@gmx.de>2018-10-08 16:57:27 +0000
commitd44221f9c8f3686e040ff9481829315068b321a3 (patch)
tree76337bf1cae88feda44e3c63dd7e32e964e8767d /src/soc/nvidia/tegra124
parent834543c0c71544b547194b093b8e1da990722762 (diff)
downloadcoreboot-d44221f9c8f3686e040ff9481829315068b321a3.tar.xz
Move compiler.h to commonlib
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra124')
-rw-r--r--src/soc/nvidia/tegra124/include/soc/clk_rst.h2
-rw-r--r--src/soc/nvidia/tegra124/include/soc/dma.h1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/emc.h1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/spi.h1
-rw-r--r--src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c1
-rw-r--r--src/soc/nvidia/tegra124/uart.c1
6 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/clk_rst.h b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
index 7cac4ba319..07e710a9f3 100644
--- a/src/soc/nvidia/tegra124/include/soc/clk_rst.h
+++ b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
@@ -16,8 +16,6 @@
#ifndef _TEGRA124_CLK_RST_H_
#define _TEGRA124_CLK_RST_H_
-#include <compiler.h>
-
/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
struct __packed clk_rst_ctlr {
u32 rst_src; /* _RST_SOURCE, 0x000 */
diff --git a/src/soc/nvidia/tegra124/include/soc/dma.h b/src/soc/nvidia/tegra124/include/soc/dma.h
index 4cb1dea616..42c70275f5 100644
--- a/src/soc/nvidia/tegra124/include/soc/dma.h
+++ b/src/soc/nvidia/tegra124/include/soc/dma.h
@@ -19,7 +19,6 @@
#define __NVIDIA_TEGRA124_DMA_H__
#include <inttypes.h>
-#include <compiler.h>
#include <soc/addressmap.h>
/*
diff --git a/src/soc/nvidia/tegra124/include/soc/emc.h b/src/soc/nvidia/tegra124/include/soc/emc.h
index 1311f9efa2..8e190f9358 100644
--- a/src/soc/nvidia/tegra124/include/soc/emc.h
+++ b/src/soc/nvidia/tegra124/include/soc/emc.h
@@ -19,7 +19,6 @@
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
enum {
EMC_PIN_RESET_MASK = 1 << 8,
diff --git a/src/soc/nvidia/tegra124/include/soc/spi.h b/src/soc/nvidia/tegra124/include/soc/spi.h
index 80ced37689..875e88032a 100644
--- a/src/soc/nvidia/tegra124/include/soc/spi.h
+++ b/src/soc/nvidia/tegra124/include/soc/spi.h
@@ -19,7 +19,6 @@
#include <spi-generic.h>
#include <soc/dma.h>
#include <stddef.h>
-#include <compiler.h>
struct tegra_spi_regs {
u32 command1; /* 0x000: SPI_COMMAND1 */
diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
index a8b2e69ea0..7cc320405a 100644
--- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <compiler.h>
/* Function unit addresses. */
enum {
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index 5cb8112d81..50c395658a 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/console.h> /* for __console definition */