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| author | Furquan Shaikh <furquan@google.com> | 2014-07-07 11:45:15 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-04 19:58:30 +0100 |
| commit | e5d014c29abc724e15c23c7a33a7d1742277e057 (patch) | |
| tree | 08bc4dec3c2d928e64d8d16f3e6e031a8c0427b3 /src/soc/nvidia/tegra132/Kconfig | |
| parent | dfe7ea2b4eb86afcb59819fc9a72a41ceede8215 (diff) | |
| download | coreboot-e5d014c29abc724e15c23c7a33a7d1742277e057.tar.xz | |
coreboot t132: Stack init re-work
1) In order to avoid stack from overflowing during ramstage decompression,
initialize stack right at the beginning of romstage.
2) Declare different Kconfig options for stack at each stage.
3) Provide a macro that does stack seeding if required and calls appropriate
function.
BUG=None
BRANCH=None
TEST=Compiles and runs successfully on rush.
Original-Change-Id: I55d6ce59ea91affba3e86d68406921497c83fb52
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/206880
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 5e32d73803a2a9d222fcc4ca5f58efd3abe95d34)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ib833a1badb170a33cbf20d232019425b59db60cd
Reviewed-on: http://review.coreboot.org/8583
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/Kconfig')
| -rw-r--r-- | src/soc/nvidia/tegra132/Kconfig | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig index a8b9bdc139..761685abc9 100644 --- a/src/soc/nvidia/tegra132/Kconfig +++ b/src/soc/nvidia/tegra132/Kconfig @@ -51,14 +51,30 @@ config RAMSTAGE_BASE hex default 0x80200000 -config STACK_TOP +config BOOTBLOCK_STACK_TOP hex default 0x40020000 -config STACK_BOTTOM +config BOOTBLOCK_STACK_BOTTOM hex default 0x4001c000 +config ROMSTAGE_STACK_TOP + hex + default 0x40020000 + +config ROMSTAGE_STACK_BOTTOM + hex + default 0x4001c000 + +config RAMSTAGE_STACK_TOP + hex + default 0x80020000 + +config RAMSTAGE_STACK_BOTTOM + hex + default 0x8001c000 + config CBFS_CACHE_ADDRESS hex "memory address to put CBFS cache data" default 0x40006000 |