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| author | Furquan Shaikh <furquan@google.com> | 2014-04-28 16:43:07 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-26 11:41:17 +0100 |
| commit | 4208e0c834fe1e2ed1704418e7170c86e14e141d (patch) | |
| tree | a104e48d49e718c942c7b3edc64f19f8353769d3 /src/soc/nvidia/tegra132/Kconfig | |
| parent | 17b9c198e0ebbd79d1b581eba0810a4c7979f012 (diff) | |
| download | coreboot-4208e0c834fe1e2ed1704418e7170c86e14e141d.tar.xz | |
tegra132: Add support for tegra132 soc
Add basic support for tegra132 soc.
BUG=None
BRANCH=None
TEST=Compiles successfully for rush board using tegra132 soc
Original-Change-Id: If2a3de80026e7729ac6da8484ff6c56607c52a63
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/197398
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 4746bff6e9f4b20abc44d0b6fce9691aea63583c)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: If2a3de80026e7729ac6da8484ff6c56607c52a63
Reviewed-on: http://review.coreboot.org/8040
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/Kconfig')
| -rw-r--r-- | src/soc/nvidia/tegra132/Kconfig | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig new file mode 100644 index 0000000000..df58f06a03 --- /dev/null +++ b/src/soc/nvidia/tegra132/Kconfig @@ -0,0 +1,24 @@ +config SOC_NVIDIA_TEGRA132 + bool + default n + select ARCH_BOOTBLOCK_ARMV4 + select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_RAMSTAGE_ARMV8_64 + select ARM_LPAE + select DYNAMIC_CBMEM + +if SOC_NVIDIA_TEGRA132 + +config BOOTBLOCK_ROM_OFFSET + hex + default 0x0 + +config CBFS_HEADER_ROM_OFFSET + hex "offset of master CBFS header in ROM" + default 0x18000 + +config CBFS_ROM_OFFSET + hex "offset of CBFS data in ROM" + default 0x18080 + +endif |