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authorJimmy Zhang <jimmzhang@nvidia.com>2014-12-09 16:44:21 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-13 17:04:51 +0200
commite994a8038849fdb360d30d195fa6d8bf417ea29a (patch)
tree8061ee497f755c20fd3b2f96670697e0aef6462d /src/soc/nvidia/tegra132/Makefile.inc
parent099efebb1ea9f6ab1529e18fc4142c2e784d7cb5 (diff)
downloadcoreboot-e994a8038849fdb360d30d195fa6d8bf417ea29a.tar.xz
rush: Add and select DO_SOR_INIT config option
Select DO_SOR_INIT to enable dp display api BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Change-Id: Iddf19195722856865a7c06ce96492012ab729184 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 31492f51c030aeb7a3ac792a02665642ec999405 Original-Change-Id: I4daca43239235ca6d233c4457096d3b98fcaf65c Original-Reviewed-on: https://chromium-review.googlesource.com/234274 Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-on: http://review.coreboot.org/9586 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/Makefile.inc')
-rw-r--r--src/soc/nvidia/tegra132/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index 25d1a5b0de..2beeb78c68 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -72,6 +72,7 @@ ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi_dsi.c
ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi.c
ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi-phy.c
ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += ./jdi_25x18_display/panel-jdi-lpm102a188a.c
+ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += dp.c
ramstage-y += soc.c
ramstage-y += spi.c