diff options
author | Julius Werner <jwerner@chromium.org> | 2014-10-20 13:25:21 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-08 09:26:14 +0200 |
commit | 96195eeb71545b070e37413bfad1520ceca3da54 (patch) | |
tree | 4de9b88caa9bb4fd0150aed5df1cee89a82a2a52 /src/soc/nvidia/tegra132/i2c6.c | |
parent | dae15a63e426230117b575f9acc504110748e98f (diff) | |
download | coreboot-96195eeb71545b070e37413bfad1520ceca3da54.tar.xz |
tegra132: Change all SoC headers to <soc/headername.h> system
This patch aligns tegra132 to the new SoC header include scheme.
Also alphabetized headers in affected files since we touch them anyway.
BUG=None
TEST=Tested with whole series. Compiled Rush_Ryu.
Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591
Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224505
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9369
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/i2c6.c')
-rw-r--r-- | src/soc/nvidia/tegra132/i2c6.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/nvidia/tegra132/i2c6.c b/src/soc/nvidia/tegra132/i2c6.c index e4fbd19f4e..86373d621e 100644 --- a/src/soc/nvidia/tegra132/i2c6.c +++ b/src/soc/nvidia/tegra132/i2c6.c @@ -18,13 +18,13 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <delay.h> #include <soc/addressmap.h> +#include <soc/clk_rst.h> #include <soc/clock.h> -#include <soc/padconfig.h> #include <soc/nvidia/tegra/i2c.h> -#include <soc/nvidia/tegra132/power.h> -#include <soc/nvidia/tegra132/clk_rst.h> -#include "delay.h" +#include <soc/padconfig.h> +#include <soc/power.h> #define I2C6_BUS 5 #define I2C6_PADCTL 0xC001 |