diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-07-10 12:50:27 -0500 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-05 17:31:04 +0100 |
commit | 5626d8f59a4a70da4724e778a38e0fe6847fa5d8 (patch) | |
tree | 4df6904e61edce7d7216970cff7ff1371012b11c /src/soc/nvidia/tegra132/power.c | |
parent | 1b770fb4b5a83042a6007cd9d263bfdf078822ad (diff) | |
download | coreboot-5626d8f59a4a70da4724e778a38e0fe6847fa5d8.tar.xz |
t132: bring up 64-bit denver core
The startup sequence for cpu0 is implemented while also
providing a trampoline for transitioning to 64-bit mode because
the denver cores on t132 come out of cold reset in 32-bit mode.
Mainboard callbacks are provided for providing the board-specific
bits of the bringup sequence.
BUG=chrome-os-partner:29923
BRANCH=None
TEST=Built and booted through ramstage.
Original-Change-Id: I50755fb6b06db994af8667969d8493f214a70aae
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207263
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
(cherry picked from commit 17f09bf4bdb43986c19067ca8fd65d4c5365a7c6)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I14d99c24dd6e29a4584c8c548c4b26c92b6ade97
Reviewed-on: http://review.coreboot.org/8586
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/power.c')
-rw-r--r-- | src/soc/nvidia/tegra132/power.c | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/power.c b/src/soc/nvidia/tegra132/power.c new file mode 100644 index 0000000000..5c7cc05ef4 --- /dev/null +++ b/src/soc/nvidia/tegra132/power.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/console.h> +#include <soc/addressmap.h> + +#include "pmc.h" +#include "power.h" + +static struct tegra_pmc_regs * const pmc = (void *)TEGRA_PMC_BASE; + +static int partition_powered(int id) +{ + return read32(&pmc->pwrgate_status) & (0x1 << id); +} + +void power_ungate_partition(uint32_t id) +{ + printk(BIOS_INFO, "Ungating power partition %d.\n", id); + + if (!partition_powered(id)) { + uint32_t pwrgate_toggle = read32(&pmc->pwrgate_toggle); + pwrgate_toggle &= ~(PMC_PWRGATE_TOGGLE_PARTID_MASK); + pwrgate_toggle |= (id << PMC_PWRGATE_TOGGLE_PARTID_SHIFT); + pwrgate_toggle |= PMC_PWRGATE_TOGGLE_START; + write32(pwrgate_toggle, &pmc->pwrgate_toggle); + + /* Wait for the request to be accepted. */ + while (read32(&pmc->pwrgate_toggle) & PMC_PWRGATE_TOGGLE_START) + ; + printk(BIOS_DEBUG, "Power gate toggle request accepted.\n"); + + /* Wait for the partition to be powered. */ + while (!partition_powered(id)) + ; + } + + printk(BIOS_INFO, "Ungated power partition %d.\n", id); +} |