summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra132/ramstage.c
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2015-10-15 15:50:30 -0700
committerJulius Werner <jwerner@chromium.org>2015-11-07 03:29:35 +0100
commitfdb3a8d07d46c0011555029e041890dc668ec7f0 (patch)
tree18594c3e21c1d153865360d09f727a0cad63e82e /src/soc/nvidia/tegra132/ramstage.c
parentb3f6ad35221984419ee0998f47b778d669d1636e (diff)
downloadcoreboot-fdb3a8d07d46c0011555029e041890dc668ec7f0.tar.xz
arm64: Remove cpu intialization through device-tree
Since, SMP support is removed for ARM64, there is no need for CPU initialization to be performed via device-tree. Change-Id: I0534e6a93c7dc8659859eac926d17432d10243aa Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/11913 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/ramstage.c')
-rw-r--r--src/soc/nvidia/tegra132/ramstage.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/ramstage.c b/src/soc/nvidia/tegra132/ramstage.c
index 64b61e9b08..ca9cec49c3 100644
--- a/src/soc/nvidia/tegra132/ramstage.c
+++ b/src/soc/nvidia/tegra132/ramstage.c
@@ -16,8 +16,18 @@
#include <arch/stages.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
+#include <soc/mc.h>
#include <soc/mmu_operations.h>
+static void lock_down_vpr(void)
+{
+ struct tegra_mc_regs *regs = (void *)(uintptr_t)TEGRA_MC_BASE;
+
+ write32(&regs->video_protect_bom, 0);
+ write32(&regs->video_protect_size_mb, 0);
+ write32(&regs->video_protect_reg_ctrl, 1);
+}
+
void arm64_soc_init(void)
{
trustzone_region_init();
@@ -25,4 +35,9 @@ void arm64_soc_init(void)
tegra132_mmu_init();
clock_cpu0_config();
+
+ clock_init_arm_generic_timer();
+
+ /* Lock down VPR */
+ lock_down_vpr();
}