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| author | Aaron Durbin <adurbin@chromium.org> | 2014-07-15 13:13:51 -0500 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-13 00:01:14 +0100 |
| commit | b397f011497e9ea3fa06ed8d3bf29947e55a2677 (patch) | |
| tree | 03b86cd214ae09533007f96b33611f85e9e74f6c /src/soc/nvidia/tegra132/ramstage.c | |
| parent | c20ff482a73ddb752fa32fa9d4b3e89420d1fee9 (diff) | |
| download | coreboot-b397f011497e9ea3fa06ed8d3bf29947e55a2677.tar.xz | |
tegra132: split memory range querying to above/below 4GiB
The address map code was originally assuming all carveouts would
be packed together in the upper end of the physical memory
address space. However, the trust zone carveout is always in the
32-bit address space. Therefore, one needs to query memory ranges
by above and below 4GiB with the assumption of carveouts being
packed at the top of *each* resulting range.
BUG=chrome-os-partner:30572
BRANCH=None
TEST=Built and ran through coreboot on rush.
Original-Change-Id: Iab134a049f3726f1ec41fc6626b1a6683d9f5362
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/208101
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 8d5795fbff36e91906384e10774a32541d358324)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: If15ff48d5a4c81731eb364980b30c8086deb1cca
Reviewed-on: http://review.coreboot.org/8641
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/ramstage.c')
| -rw-r--r-- | src/soc/nvidia/tegra132/ramstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra132/ramstage.c b/src/soc/nvidia/tegra132/ramstage.c index 7b2f4e8c31..8d64c3e11f 100644 --- a/src/soc/nvidia/tegra132/ramstage.c +++ b/src/soc/nvidia/tegra132/ramstage.c @@ -38,7 +38,7 @@ void arm64_soc_init(void) * Therefore configure the region early. Also, the TZ region can only * live in 32-bit space. */ - memory_range_by_bits(ADDRESS_SPACE_32_BIT, &base, &end); + memory_in_range_below_4gb(&base, &end); /* Place the TZ area just below current carveout regions. */ end -= tz_size_mib; |