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authorAaron Durbin <adurbin@chromium.org>2014-07-10 15:05:13 -0500
committerMarc Jones <marc.jones@se-eng.com>2015-03-05 17:31:26 +0100
commiteeacf74a7ce9f3302d813287e6409d660da43958 (patch)
tree665f7335f643a95dfab1c2e64bfcd95bad561970 /src/soc/nvidia/tegra132/sdram.h
parent5626d8f59a4a70da4724e778a38e0fe6847fa5d8 (diff)
downloadcoreboot-eeacf74a7ce9f3302d813287e6409d660da43958.tar.xz
t132: Enable cbmem console support
Enabled CBMEM support for t132 platforms. Some of the existing code is moved around to avoid dependencies in the other stages that need it. BUG=None BRANCH=None TEST=Built and booted a rush with cbmem support. Original-Change-Id: I78a31b58ab9cc01a7b5d1fffdb6c8ae0c446c7dd Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207163 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit f552197dbda06c754b5664c3bed4ed361154229a) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I8fa2919714b467cc976e5bb5c4716e5b7979694b Reviewed-on: http://review.coreboot.org/8589 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/sdram.h')
-rw-r--r--src/soc/nvidia/tegra132/sdram.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra132/sdram.h b/src/soc/nvidia/tegra132/sdram.h
index ab6bf0fd18..7684eb86d4 100644
--- a/src/soc/nvidia/tegra132/sdram.h
+++ b/src/soc/nvidia/tegra132/sdram.h
@@ -24,8 +24,6 @@
uint32_t sdram_get_ram_code(void);
void sdram_init(const struct sdram_params *param);
-int sdram_size_mb(void);
-uintptr_t sdram_max_addressable_mb(void);
/* Save params to PMC scratch registers for use by BootROM on LP0 resume. */
void sdram_lp0_save_params(const struct sdram_params *sdram);