diff options
author | Julius Werner <jwerner@chromium.org> | 2015-02-19 14:51:15 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-21 08:22:28 +0200 |
commit | 2f37bd65518865688b9234afce0d467508d6f465 (patch) | |
tree | eba5ed799de966299602b30c70d51dd40eaadd73 /src/soc/nvidia/tegra132/uart.c | |
parent | 1f60f971fc89ef841e81b978964b38278d597b1d (diff) | |
download | coreboot-2f37bd65518865688b9234afce0d467508d6f465.tar.xz |
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/uart.c')
-rw-r--r-- | src/soc/nvidia/tegra132/uart.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/nvidia/tegra132/uart.c b/src/soc/nvidia/tegra132/uart.c index 90765e1496..e7b7ca9f69 100644 --- a/src/soc/nvidia/tegra132/uart.c +++ b/src/soc/nvidia/tegra132/uart.c @@ -63,19 +63,19 @@ static void tegra132_uart_init(struct tegra132_uart *uart_ptr) tegra132_uart_tx_flush(uart_ptr); // Disable interrupts. - writeb(0, &uart_ptr->ier); + write8(&uart_ptr->ier, 0); // Force DTR and RTS to high. - writeb(UART8250_MCR_DTR | UART8250_MCR_RTS, &uart_ptr->mcr); + write8(&uart_ptr->mcr, UART8250_MCR_DTR | UART8250_MCR_RTS); // Set line configuration, access divisor latches. - writeb(UART8250_LCR_DLAB | line_config, &uart_ptr->lcr); + write8(&uart_ptr->lcr, UART8250_LCR_DLAB | line_config); // Set the divisor. - writeb(divisor & 0xff, &uart_ptr->dll); - writeb((divisor >> 8) & 0xff, &uart_ptr->dlm); + write8(&uart_ptr->dll, divisor & 0xff); + write8(&uart_ptr->dlm, (divisor >> 8) & 0xff); // Hide the divisor latches. - writeb(line_config, &uart_ptr->lcr); + write8(&uart_ptr->lcr, line_config); // Enable FIFOs, and clear receive and transmit. - writeb(UART8250_FCR_FIFO_EN | UART8250_FCR_CLEAR_RCVR | UART8250_FCR_CLEAR_XMIT, - &uart_ptr->fcr); + write8(&uart_ptr->fcr, + UART8250_FCR_FIFO_EN | UART8250_FCR_CLEAR_RCVR | UART8250_FCR_CLEAR_XMIT); } static unsigned char tegra132_uart_rx_byte(struct tegra132_uart *uart_ptr) @@ -88,7 +88,7 @@ static unsigned char tegra132_uart_rx_byte(struct tegra132_uart *uart_ptr) static void tegra132_uart_tx_byte(struct tegra132_uart *uart_ptr, unsigned char data) { while (!(read8(&uart_ptr->lsr) & UART8250_LSR_THRE)); - writeb(data, &uart_ptr->thr); + write8(&uart_ptr->thr, data); } static void tegra132_uart_tx_flush(struct tegra132_uart *uart_ptr) |