diff options
author | Yen Lin <yelin@nvidia.com> | 2015-05-06 13:56:50 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-09 00:09:16 +0200 |
commit | cad9e7a6ecf2db58ba30c49847851248d4712110 (patch) | |
tree | f9d33593d94ee734c62746ff07034513ba369c17 /src/soc/nvidia/tegra210/ccplex.c | |
parent | 13fb74927ee3d3527494622ca022010c519edd26 (diff) | |
download | coreboot-cad9e7a6ecf2db58ba30c49847851248d4712110.tar.xz |
t210: set CAR2PMC_CPU_ACK_WIDTH to 0
HW team has suggested to set CAR2PMC_CPU_ACK_WIDTH to 0.
BUG=None
BRANCH=None
TEST=Tested on Smaug; still boot to kernel
Change-Id: I4d13a4048b73455b16da7a40c408c912fa97e4e7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8891a79e72af26d986af9e415149d4ca0aa6fedd
Original-Change-Id: I850a6756d7743993802fb85aad403e4cbef7a661
Original-Signed-off-by: Yen Lin <yelin@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/282416
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10841
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/ccplex.c')
-rw-r--r-- | src/soc/nvidia/tegra210/ccplex.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra210/ccplex.c b/src/soc/nvidia/tegra210/ccplex.c index f3c61cbbe6..a3c67225c0 100644 --- a/src/soc/nvidia/tegra210/ccplex.c +++ b/src/soc/nvidia/tegra210/ccplex.c @@ -92,9 +92,26 @@ static void request_ram_repair(void) stopwatch_duration_usecs(&sw)); } +static void set_cpu_ack_width(uint32_t val) +{ + uint32_t reg; + + reg = read32(CLK_RST_REG(cpu_softrst_ctrl2)); + reg &= ~CAR2PMC_CPU_ACK_WIDTH_MASK; + reg |= val; + write32(CLK_RST_REG(cpu_softrst_ctrl2), reg); +} + void ccplex_cpu_prepare(void) { enable_cpu_clocks(); + + /* + * The POR value of CAR2PMC_CPU_ACK_WIDTH is 0x200. + * The recommended value is 0. + */ + set_cpu_ack_width(0); + enable_cpu_power_partitions(); mainboard_configure_pmc(); |